Networks 51 3s 3 (C) s2 2s 2 2s 3 (D) s2 2s 2 (A) 2.83 A, 4.32 V (B) 2.5 A, 5 V (C) 5 A, 0 V (D) 5 A, 0 V 88. For the circuit shown in the figure, the 90. An ideal capacitor is charged to a transfer function is equal to voltage V0 and connected at t = 0 across 1 an ideal inductor L . (The circuit now (A) s2 R s 1 / LC consists of a capacitor and inductor L 1 alone). If we let o 1 (B) R Ls , the voltage 1LC LC (C) s2 R s 1 across the capacitor at time t > 0 is given L LC by 1 (D) s2 1 (A) V0 (B) V0 cos (0 t) LC (C) V0 sin (0 t) 89. In the circuit shown in figure g^t h = 2.5t (D) V0 e–t cos (0 t) 91. In the circuit shown in the figure, the V. What are the values of i^t h and vL input signal is vi (t) = 5 + 3 cos t ^t h at t = 4 seconds The steady state output is expressed as v0 (t) = P + Q cos (t – ) . If CR = 2, the values of P and Q are
52 Gate Electronics and Communication Engineering (A) P = 0 and Q = 6/ 5 (C) 5 2 cos a1000t kA 4 (B) P = 0 and Q = 3/ 5 (D) 5 2A (C) P = 5 and Q = 6/ 5 (D) P = 5 and Q = 3 mF 92. For the circuit shown below the steady- state current I is (A) 0 A (B) 5 2 cos 1000t A ANSWERS WITH EXPLANATION 1. Option (A) is correct Z (s) = 8^1s || Zbh + ^1s || ZchB || Za...(i) Transforming the Y -connection of two 1s Zb sb s 21 ss 2 1s Zc 1 resistors and capacitor into equivalent -connection a s2 s 2 s 2 s Z s s2 s 2 s 2 So, 2ss 22 2s s 2s2 s 2 2ss 2 s 1 Pole at s =– 1, zero at s = 0. 2. Option (D) is correct. For an inductor time domain to s - domain transformation is shown as 1/ s1 11/ s 11 Za 1 / s s 2 Zb Zc 1/ s1 11/ s 11 s 2 1 s Now the circuit becomes as
Networks 53 or Now, For t < 0 : V s LsI s LIo I s V s Io Ls s The equivalent circuit in s -domain 10 4. Option (D) is correct. i (0) = 10 mA We use parallel equivalent circuit of the So both option (A) and (B) are capacitor equivalent circuits of the given circuit. 3. Option (D) is correct. In the time domain vt L di t 20 dt Taking Laplace transform V (s) = L [sI (s) – i (0)] = LsI (s) – LI0 The equivalent circuit in s -domain Vc s Cvc o : 50 25D s
54 Gate Electronics and Communication Engineering 50 25 I s CsV s CVo s Again, V s 1 I s Vo 20 #103 #10 50 Vc o Cs s s 25 Another equivalent circuit in s -domain. 0.2 50 25 10 50 25s s2 Taking inverse Laplace transform vC (t) = 10e–2t u (t) A Alternate Method : Vc t Vc 3 Vc 0 Vc 3 et/ Vc 0 10V , Vc 3 0 1 1 1 RC 25 # 20 #103 2 So, vC (t) = 10e–2t , t > 0 6. Option (A) is correct. 5. Option (D) is correct Drawing series equivalent circuit of In time domain inductor and capacitor in s -domain we obtain that v1 LiL 0 2 #2 4 V2vc 0 5 s s 7. Option (A) is correct. Drawing equivalent s -domain circuit i t C dv t dt Taking Laplace transform on both sides I (s) = C 6sV (s) – v (0)@ I (s) = CsV (s) – CVo Equivalent circuit in s -domain In the circuit Current,
Networks 55 Vc0 Vc 0 12t it te ut A ss I s 11 12 4s 6s 10. Option (C) is correct. 83 Transforming the circuit in to s -domain s s 12 Vs t 12tu t & 12 11 c2 4s 6s Voltage, 2&2 1H &1s Vc sVc 0 1s 1 8 12 5 it& I s 4 s 4s s Vc t 5u t 5V , t 0 8. Option (A) is correct. For a capacitor I s 12 / s2 s2 12 s 2s Cvc (0) = 100 # 10–3 # 20 = 2 A 2 Note: In the circuit, given in option (C) polarity of voltage source is reversed so Using partial fraction expansion it is not an equivalent circuit, I s s 3 2 3 6 9. Option (B) is correct. s s2 In s -domain Taking inverse Laplace transform (t) & 1 i t 3e2tu t 3u t 6tu t 10 & 10 6t 3e2t 3 u t A 5H & 5s 11. Option (C) is correct. By transforming the circuit into s - domain 1 I s 10 1 5s 5 1 2 s Taking inverse Laplace transform
56 Gate Electronics and Communication Engineering V s 5 50 1000 D V s s2 120 7s 10 ss 5 s 50b 1000 V 25 #104 Using initial value theorem: s sW s 50s 1000 120s 50 1000WV 7s 10 s 0 s v lim sV lim s2 0 s\"3 s\"3 T #103 s s 20 Using final value theorem: Taking inverse Laplace transform: v 3 lim sV s lim s2 s120 0 v (t) = 250 (1 – e–20t) u (t) V 7s 10 s\"0 s\"0 Alternate Method: 14. Option (C) is correct. The problem can be solved using initial Admittance, and final condition as done in chapter- 7. Yin s 1 2s Zin s 0.25 The voltage across capacitor will be: Yin s 1 1 Cs 1 vC (t) = vC (3) + 6vC (0) – vC (3)@e–t/ ^1 / Csh R R 12. Option (C) is correct. For t < 0, 12 (t) = 0, so all initial conditions are zero. For t > 0, considering the circuit into s - domain Using source transformation C 2F, R 4 Circuit consists of a 4 resistor in parallel with a 2F capacitor. 15. Option (A) is correct. Using equivalent circuit of initialized inductor and initialized capacitor V s e s 10 / s / s s2 120 7 10 7s 10 13. Option (B) is correct.
Networks 57 Cvc 0 0.1#1 0.1A L i t I s I0 c2 iL 0 0.5 L iL t IL s 5 1 s 1 5 s2 25 ss c2 s s 5 s 0.5 1 Ls b0.1 0.5 :10 Vc .0.1 s D b Cs ss 0.4 sD IL s 25 / s2 s 5 25 I s b 0.1s 0.5 100.4s b 0.1s 0.5 4s H s I0 / s2 I0 s 5 s 10 0.4s s 10 0.4s ...(ii) s 54 s 5 s 5 H s 5 s 1k I0a 5 100 4s2 s2 25 s2 25 s2 25 Taking inverse Laplace transform Comparing equation (i) and (ii) vC (t) = (cos 5t – sin 5t) u (t) V 15 16. Option (D) is correct. Ls 1 s I a 5 1k 0 In Laplace transform, the circuit is 5 10 I I0 5A 5 L & L 0.2H 17. Option (D) is correct. 18. Option (B) is correct. iL (0) = 0 Input impedance, IL s 1I s Zin s b5 5 2 5s Ls 1 s (Using the current division) Zin s b5 5 2 5s 25s2 35s 10 5s2 7s 5 Transfer function: s 5 5 2 5s s H s IL s 1 19. Option (B) is correct. I s Ls 1 ...(i) From the given i (t) and iL (t):
58 Gate Electronics and Communication Engineering Voltage across 2 resistor is: 8 3b 4 ^4 shI 2 s bI1 s 4 Al s s s 10 8 12 ^4 shI 2 s V s s ^ 2 0.1sh b 10 2 # 2 0.1s 10 # 2s s s 20 0.1s s s 20 20 s 4 I2 s s V s 20 I2 s 20 4 s 5 4 5 s 20 s ss By taking inverse Lapalce transform: V0 s 2 I1 s I2 s v t 20e20tV 24 2 5 2:1 5 20. Option (B) is correct s s 4 s s s 4D Z s 1 Taking inverse Laplace transform: vo (t) = 2 [1 – 5e–4t] u (t) V 2s 0.25 22. Option (C) is correct. Y s 2s 0.25 Transforming the circuit into s -domain Y s Y1 Y2 in parallel Y1 2s Cs * C 2F R 1 4 0.25 21. Option (D) is correct. Taking zero initial condition and 1 transforming the circuit into s -domain. Combining the impedance Z1 1 1s s s 1 11 Z2 1 1 1 s s 1 s 1 1 Applying mesh analysis to the circuit Mesh 1: I1 (s) =– 4/s s Mesh 2: 8 2 1 I 2 s I1 s s I 2 s 1I2 s s 8 3I1 s ^4 shI2 s s
Networks 59 V0 s b Z1 Z2 2 Vs s 24. Option (C) is correct. Z2 Replacing the inductor by s -domain equivalent 1 Simplifying 1 s 1 Vs s 3 1 1 Vs s s 3 s Z1 s 0.4s 40 0.4s 40 s 1 s 1 40s 100 In steady state s \" j 0.4s 40 V0 j 3 1 1 Vs 25. Option (D) is correct. j Considering the circuit into s -domain with zero initial conditions In phasor domain, Vs = 30/0c V V0 j 30 / 0c 10 1rad / s j 1 j Phasor form 31 V0 5 2 / 45c V vo t 5 / 2 cost 45cV 23. Option (D) is correct. Transforming the circuit into s -domain is t 2e 2t u t L s 2 2 1F & 1 s 2H & 2s Using source transformation b2 1 2 s s2 Io s 1 b 1 b2 s 2s ; 2s 1 2s 1 1 sE; s 2 E 2s 2 2s 2s 1 G; s 2 E s 2 2 s 2 1 s 2 2 1 s 1 2 1 s By taking inverse Laplace transform: io (t) = 2 (e–t – e–2t) u (t) A
60 Gate Electronics and Communication Engineering Adding parallel connected current sour ces 4 2 2s 4 s2 s s2 ZTh 3 6 4 2 4 6 Now, in s -domain circuit can be reduces as Transforming the current source into equivalent voltage source V s 1/ s V s ZTh 1/ s b 2s 4 1 / s b 16 16 61/ s s s 6s 1 s Vo s 1 2 1 Initial value of v (t), s s 1 2s 4 vo lim sv s lim s 16s 0V 2s s2 2 s\"3 s\"3 6s 1 26. Option (B) is correct. Final value of v (t), Method 1 : we can obtain initial and final v3 lim sv s lim 16s 16V value of v (t) using initial and final value theorem. s\"0 s\"0 s 6s 1 First obtain Thevenin equivalent across Alternate Method : capacitor terminals As discussed in Chapter-5 initial and final value can be obtained directly. For t < 0, 24u (t) = 0 In steady state capacitor acts as an open circuit.
Networks 61 Cvc 0 iL 0 svc 0 i L 0 Vc s Cs 1 1 s2 1 s 1 For t > 0, 24u (t) = 24 V R Ls RC LC 100s 50 133 33 s2 250s 104 s 200 s 50 By taking inverse Laplace transform: 24 vC (t) = [133e–200t – 33e–50t] u (t) V 28. Option (C) is correct. V 3 6 24 16V For t < 0 : 63 27. Option (B) is correct. Transforming the circuit into s -domain I s 1/ s s s2 1 1 s 1 3 / 22 i 0 10 5A 1s 1/ s 1/ 22 2 We know that, For t > 0, transforming the circuit into s -domain. 0 10 V & s s a2 2&2 For the inductor L eat sin 0t Inverse LaplaceTransform By taking inverse Laplace transform of I (s) i t 1 et/2sin c 3 tm 2 et/2 sin c 3 3 / 2i 2 3 2 tm A 28. Option (A) is correct Transforming the circuit into s -domain using the equivalent circuits of initialized capacitor and inductor
62 Gate Electronics and Communication Engineering i1 0 6 4 6 1A 42 4 4 iL 0 b 4 4 4 i1 0 0.5 A Li (0) = 0.4 (5) = 2 V For t > 0, transforming the circuit into s -domain For t > 0, the s -domain equivalent circuit is V s 4 2i 0 4L 2 2s V s 4 2# 4 2 ^ 2s s 6 2s 0.5h 63 I s 10 2 2 s 5 5s 5 By taking inverse Laplace transform 2s 0.4s 10 s s 10 v (t) = 2e–3t V s 31. Option (B) is correct. 0.4 s Let inductor current is iL (t) For t < 0 : Using partial fraction: L s 2.5 2.5 Using source transformation s s 10 Taking inverse Laplace transform: i (t) = 2.5 (1 + e–10t) A, t > 0 Alternate Method: We can find inductor current i (t) using initial and final condition as done in chapter-7 i (t) = i (3) + 6i (0) – i (3)@e–t/ 30. Option (A) is correct. Let current through inductor is iL (t). For t < 0 : 6
Networks 63 iL 0 30 10 20 4A For t > 0, considering the circuit into s - 32 5 domain. For t > 0, the switch is cloded, transforming the circuit into s -domain I s 10 / s 10 0.004 2500 125 #103 2500s 125000 s 50 Transforming both the voltage sources s into current sources V1 s 105 # Is 105 # 0.004 400 8 8 s s s 50 s s 50 s s 50 Taking inverse Laplace transform v1 (t) = (8 – 8e–50t) u (t) V 33. Option (A) is correct iL 0 5 4 5 9 V2 s I s b 25 #103 s s s ss s 3 2s 2s3 6s 103 0.004 # 25 # 100 2 2 s 50 s s 50 2s 3 2s 3 s s 50 s By taking inverse Laplace transform v2 (t) = 2 [1 – e–50t] u (t) V 34. Option (C) is correct. For 0 < t < 2, the 150 mF capacitor is charged to 35 V. From conservation of charge b 6s Q = C1 V1 + C2 V2 C1 # 35 = C1 # VC (2+) + C2 VC (2+) 0.15 # 35 I1 s 2s 3' b a b 6s lb 9 3 6s s 18s 18 s 1 = vC (2+) [0.15 + 0.1] s vC (2+) = 21 V 2s 3 The voltage remains constant for t > 2s V s 4I1 s 12 s 1 Taking inverse Laplace transform v (t) = 12e–t u (t) V 35. Option (D) is correct. 32. Option (D) is correct. For 0 < t < 2 the 150 mF capacitor is charged to 35 V. From conservation of
64 Gate Electronics and Communication Engineering charge. Characteristic equation for natural (0.15 # 35) + (0.1 # 14) = response 0.15vC (2+) + 0.1vC (2+) vC (2+) = 26.6 V 3s2 + 6s + 6 = 0 This voltage remain constant for t > 2s s2 + 2s + 2 = 0 36. Option (A) is correct. Roots, s1 =– 1 + j1, s2 =– 1 j1 Transforming the circuit in to s -domain Roots are complex conjugate, so natural response will be under damped and has the form vN (t) = e–t (A cos d t + B sin d t) = e–t (A cos t + B sin t) For the input 15? (t), forced response will be constant Reflecting the primary side circuit to the vF (t) = K secondary side So, 1 V & n 18 / s 18 36 vo (t) = vN (t) + vF (t) 2b = K + Ae–t cos t + Be–t sin t s ss 2 & n2 2 22 2 8 38. Option (B) is correct. 1 & n2b 1 22 b 1 4 / s vi t 10 t Vi s 10 s ss s it I s Vi s I s Z s I s Vi s s 10 / s 40 10s 40 Z s s 20 20 / s Using partial fraction expansion V s 4 36 8 4 4 I s 10; 2 s 1 s 20D 4 bs s 4 30 Taking inverse Laplace transform 8 16 s i t 10 2 e20t u t A s 9 39. Option (B) is correct. s 0.5 Consider the circuit in the s -domain Taking inverse Laplace transform v (t) = 9e–0.5t u (t) V 37. Option (D) is correct.
Networks 65 By comparing, o 40, 20 13 Damping factor 13 13 1.027 20 2 40 Since a dependent source is present in Since > 1, response will be over the network, to obtain Thevenin damped. impedance set all independent sources 41. Option (B) is correct. to zero(i.e. open circuit the current Transfer function of the network source) and put a test source across the load terminals H s V0 s Vi s For step input Vi (s) = 1/s c 20 So, H s s s2 8s 18 20 1 / s s2 8s 18 Characteristic equation, s2 + 8s + 18 = 0 General form, s2 + 2 0s + 02 = 0 ZTh s Vtest s By comparing 0 = 18 , 2 0 = 8 Ttest s Writing KVL: 8 8 0.94 20 2 18 –5Ia (s) + 2Ia (s) – 2sIa (s) – Vtest (s) = 0 5Itest (s) – 2Itest (s) + 2sItest (s) = Vtest (s) Ia Damping factor < 1 (response will be under damped). (s) =– Itest (s) 42. Option (C) is correct. ^3 + 2shItest (s) = Vtest (s) Transforming the circuit into s -domain ZTh s Ttest s ^2s h 3 40. Option (A) is correct. Applying nodal analysis Characteristic equation s2 + 13s + 40 = 0 General form of characteristic equation s2 20s 02 0
66 Gate Electronics and Communication Engineering Ii s 2 Ii s VA s 26I2 (s) – I1 (s)@ + 8I2 (s) + kV1 (s) + 2sI2 (s) = 0 3 s V1 (s) = 26I1 (s) – I2 (s)@ 3I s VA s ....(i) 26I2 (s) – I1 (s)@ + 8I2 (s) s3 + k62 {I1 (s) – I2 (s)@ + 2sI2 (s) = 0 I s V1 s VA s 6–2 + 2k@I1 (s) + 62 + 8 – 2k + 2s@I2 (s) = 0 s x 2/ 6k – 1@I1 (s) + 6s + 5 – k@I2 (s) = 0 43. Option (C) is correct. H s I2 s s 1 k k I1 s Vab (s) = Zin (s) Iin (s) 5 Transfer function Vab s 5s 20 Pole of transfer function H (s) has a single pole at s =– 2, so P1 =– (5 – k) natural response is an exponential For bounded output pole should lie in decaying with initial value negative half of s -plane. Vab (0) = 20 V 5–k>0 Vab (t) = 20e–2t V, t > 0 44. Option (A) is correct. k – 5 < 0 or k < 5 Iab s Vin 46. Option (B) is correct. Zib The circuit can be redrawn as a H s Zab s 1 s 2 balanced whitestone bridge circuit in Zib ss 4 which there is no voltage across R and Vin no current through R . Therefore, R has no effect on the transfer function. H (s) has a single pole at s = – 4, so natural response will be 47. Option (B) is correct iab (t) = iab (0) e–4t A, t > 0 Z s I s s z sz z \" zero, p \" pole = 6e–4t A V s s p s 1 45. Option (C) is correct. Z j I j j z z j1 1rad / sec V j j 1 1 j1 Consider the s -domain circuit I = ZV Given that current leads the output voltage by 15c, so Z = tan–1 (– 1/z) – tan–1 P = 15c kVL in the right-sided mesh = tan–1 (– 1/z) – tan–1 1 = 15c tan–1 (– 1/z) = 60c
Networks 67 1 tan 60c 3 H s 1 z z 1 s2 3 In steady state s \" j 48. Option (C) is correct. H j 1 1 2rad / sec i t 2 2 j2 H s 2s 3 H j 1 1 1 4s 5 22 22 8 2 2 X s 1 input H j tan1 b 2 45c s 2 So output, Output, Y (s) = H (s) X (s) 2s 3 1 y t H j sin^ t H j h 4s 5 s 1 sin 2t 45c Initial value of output: 22 51. Option (C) is correct. y 0 lim sY s lim s b 2s 3 1 ^2 3 / sh 4s 5 lim s\"3 s\"3 4 5 / s 52. Option (C) is correct. s s\"3 21 53. Option (B) is correct. 42 Final value of output: For t < 0, u (t) = 0 s 2s 31 2s 3 So, vs (t) =– 8V 4s 5s 4s 5 y 0 lim sY s lim lim s\"0 s\"0 s\"0 3 5 49. Option (C) is correct V0 s 2 Cs Ls 3Vi s i 0 8 4mA 0.004 A V0 s 1 2Cs 2Cs 2s / L 1 2k Vi s LCs2 s2 2s Now we transform the circuit into s - L LC domain Comparing with given transfer function 20u t 8 & 20s 8 & 2 4 & L 0.5H 2k & L 2k 5H 1 20 & C 0.1F & 5s LC For the inductor the transformation is 50. Option (D) is correct. shown
68 Gate Electronics and Communication Engineering Z (s) will be independent of s if the coefficient of s in denominator and numerator are equal RC L 2RC R L RC R L R2C 55. Option (C) is correct. Li (0) = 5 (– 0.004) =– 0.02 A State-space representation in given as I s 12 0.02 12 0.02s dx AX BZ dt s s 5s 2000 Y CX DZ 2000 5s Transfer function H (s) = C (sI – A)–1 B 2.4 0.004s 0.006 s 0.01 56. Option (B) is correct. s 400 The characteristic equation is s s 400 s2 (s2 + 11s + 30) = 0 & s2 (s + 6) (s + 5) = 0 Taking inverse Laplace transform s =– 6, 5, Being real and unequal, it is i (t) = ^6 – 10e–400t h mA, t > 0 over damped. 57. Option (A) is correct. Alternate Method: For t < 0 : u (t) = 0, 5 + 3u (t) = 5 mA This problem may be solved using initial and final condition also as done in Chapter-7. Inductor current is given as iL (t) = iL (3) + 6iL (0–) – iL (3)@e–t/ 54. Option (A) is correct. Circuit in the s -domain 5 vC (0) = 5 # 2 = 10 V Z s R Ls 1 For t > 0, transforming the circuit into s Cs -domain b R R Ls R 1 R Ls RCs 1 5 3u t & 5s 3 s b Cs 2k &2k R R Ls 1 2RCs LCs2 1 Cs 2 #106 1 F & 1 L R2Cs R s2 LCR Ls s2LC bRC R s 1 2 0.5 #106 s s H s2LC 2RCs 1 R s2 LC 2RCs 1
Networks 69 Series equivalent circuit of a capacitor From the given step response, is V0 s 1 H s 1/ s L 0.5 0.5e8t , For step inputVi s s 0 H s 0.5 0.5 s s s8 H s s4 s8 Comparing, Using source transformation 12L R R Ls s 4 16 10 12 R Ls s 8 s s s 6 sR s4 2 #10 2 s210s2 L s8 R 412 R 8 LL R 4 12 R 8 2R 12 R R 12 L 3H I 6 3 #103 59. Option (B) is correct. 2 #103 s 1000 s 1000 In terms of unit step function, vs (t) can be written as Vc s b2 # I s 10 108 Ic 3 #103 m 10 106 s b s 1000 s s 6 #103 10 6 s 6 10 16 s 6 vs (t) = 10 [u (t) – u (t – 1)] s s 1000 s s 1000 s s 1000 Laplace transformation of the given circuit Taking inverse Laplace transform: vC (t) = 16 – 6e–1000t mA, t > 0 L vs t 10 10 V s 58. Option (C) is correct. s se1 s -domain equivalent circuit for the capacitor Transfer function, V0 s R Ls Now, circuit becomes as V s V RS
70 Gate Electronics and Communication Engineering V0 s 5I1 s : 500 2000D s 5I1 s S 500 # 2000W 5I1 s 500 106 E s 2000s S 500 2000W a a I1 s Vi sT Vi s X 500 1500 2000 2 So, V0 s 5 Vi s 100 E 22 2000s VR s ^V s5/ sh 2000; 5000 s V0 s 5 Vi s 4s 1 2 10 10 5 b ses 61. Option (D) is correct 22 s 3 s H s 3 s 1 3 1 b 5 10se 5 10e1 s I s s1 s se s 1 V s s 5 1 10e1 1 H VR s s I j j 3 3 j1 V j j j 1 3 1/ 3 j By taking inverse Laplace transform vR (t) = 5e–t u (t) – 10e–(t – 1)u (t – 1) V H j 3 1 3 Note: From time shifting property of 1 31 Laplace transform H j tan1 1 3i tan1 3 If , etu t L 1 30c 60c 30c s 1 So, i t H j sin t / H j then, et1u t 1 L es 3 sin t 30c s 1 62. Option (A) is correct. 60. Option (D) is correct. Consider the circuit into s -domain as shown below, 1 Z s 1 61 2s 1@ s 1 11 2s s2 1.5s 1 s 11 2s s 1 s
Networks 71 63. Option (B) is correct V01 ^ sh H ^ shV1 ^ sh We replace the capacitor by s -domain equivalent as shown below: V01 ^ sh H ^ sh ^ 1 2shV , ^sh s The circuit becomes as V01 ^ sh 1 2 s By taking inverse Laplace transform vo1 ^t h = 2^t h – 3e–2t u^t h 65. Option (D) is correct. Transforming the circuit into s -domain Combining series or parallel connected impedances from left to right Vc s 1/ s 1 0.5 Zis s $6 2s 2 1@ 2. b 1 1 s 1/ s 1/ s b s s 2s 2 1 1 2s 2 1 Vc s Vc s 0.5 s ; : D s 2s 2 1 1 1 2s 3 s 1 s vc t 0.5u t V 2s 2 22s 3 1 6s 8 1 64. Option (B) is correct. Let transfer function of the system in 2s 3 s 1 2s 3 s 1 H^s h b 6s 8 lb 1 6s 8 2s 3 1 6s 8 s s 1 Vo ^ sh H ^ shV , ^sh 1 6s 8 2s 3 1 2s 3 s 1 V0 ^ sh s 2 6s 8 6s2 16s 11 1 66. Option (C) is correct. V0 ^ sh H ^ shVs ^ sh s 2 Into s -domain Now, input is changed as v1 ^ th v1 ^ th 2 dv1 ^ th dt or, V1 ^ sh V1 ^ sh 2sV , ^sh V1 ^ sh ^1 2shV , ^sh V Now, output will be
72 Gate Electronics and Communication Engineering We use Thevenin theorem to obtain V V s bZ11VTh s (s). 1 b 6s 3 6s 3 1 5 Thevenin Voltage : (open circuit 2 s ss 3 s voltage) s 1 s 3 Taking inverse Laplace transform v (t) = (1 + 5e–3t) u (t) V V 67. Option (C) is correct Zis s 5 R 1 Cs Writing node equation at top center 5 R ^1/ Csh 5 R node R 1/ Cs RCs 1 VTh s 3 6 0 5 RCs 1 R 5RCs 5 R RCs 1 RCs 1 s 1 s VTh s 6 s 1 3 5bs 1 1 s s RC 5C VTh s 6 6s 3 s1 s RC s Zero at s =– 10 + j0, so Thevenin Impedance: 1 1 10 RC 5C 1 1 10 ...(i) RC 5C Now when 20 resistor is connected in series ZTh (s) = s + 1 + 1 = s + 2 Zin s 20 5 R 1 25 R 1/ Cs Now, circuit can be reduced as Cs R 1/ Cs 25bs 1 1 RC 25C Zero at s =– 3.6 + j0, so 1 1 3.6 RC 25C 1 1 ...(ii) 3.6 RC 25C Solving equation (i) and (ii) C = 25 mF
Networks 73 R = 20 Zin s Vx s 1 50 I s # 6 68. Option (B) is correct. 20 3 Input admittance of the circuit is given 70. Option (C) is correct. by For t > 0, the switches are closed. Yin s Iin s We replace the capacitors by their Vin s equivalent circuits into s -domain. The circuit now becomes as Applying nodal analysis Vis s 0 Vis s 0 Vin s 4 Vin s Writing node equation at top center 5 node Iin s 50 b 1 Ls Cs Vx ^ sh b 10 5 Vx ^ sh 6 Vx ^ sh b 5 1 s s s s s Iis s Vis s : 50 0.1s D Vis s : s 5s2 100 D 50s 1 / 3s 1/ 2s 1/ 4s Yin s Iin s 5s2 s 100 10 5 Vin s 50s 71. Option (B) is correct. 69. Option (B) is correct. Consider the circuit into s -domain as shown below By applying node analysis in s -domain Writing node equation at the top center node Ix s Vx s 0 Vx s 5Vx s V1 ^ sh V1 ^ sh KV2 ^ sh V1 ^ sh V2 ^ sh 3 1/ s 1 1/ 2s 1 1 60 #103 s ^3s 1hV1 ^ sh ^2s KhV2 ^ sh 10 #103 s 660 #103Vx s@ s 10 #103 6 4Vx s @ s V2 ^ sh ^3s 1h ....(i) V1 ^ sh ^2s Kh 60 #103 sVx s 40 #103 sVx s 20 #103 sVx s V2 ^ sh 1 V1 ^ sh 1 1 Impedance, 2s V2 ^ sh 2s ...ii V1 ^ sh 2s 1
74 Gate Electronics and Communication Engineering Comparing equation (i) and (ii) For stable system, 5 2K 0 3s 1 2s 2s 1 2K 5 0 2s K K K 2 ^3s 1h ^ 2s 1h 2s ^ 2s Kh 6s2 5s 1 2s2 2sK 4s2 ^5 2K hs 1 0
Search