Eletro-X_VEGAS TURIS SKL-KBL (15341-1 91N85)

21 PW R_1D2V 1D2V_S3 D C PW R_DCBATOUT_VDDQ PG5119 B GAP-CLOSE-PW R-3-GP PC5103212 1PC5104 PC5105 12 SCD1U25V2KX-L-GP21 PU5102 DS45 SC4D7U25V5KX-L2-GP21 PG5120 AON7410-GP DS36 SC4D7U25V5KX-L2-GP 21 GAP-CLOSE-PW R-3-GP 27 12 84.07410.A37 DS 18 21 DG 21 PG5121 65 BOM 21 GAP-CLOSE-PW R-3-GP 21 12 PC5108 21 SCD1U50V3KX-L-GP 21 PG5122 DCR=5~5.5mohm Design Current=6.9A GAP-CLOSE-PW R-3-GP 12 IDC=15.5A, Isat=25A 10.4A<OCP>13.8A 12 PL5101 PW R_1D2V PG5123 C O IL- D 68U H - 5- G P- U GAP-CLOSE-PW R-3-GP 12 12 PG5124 to output cap pin1, not 5 DYPR5120 PC5113 PC5110 PC5111 PC5112 PC5114 PC5119 GAP-CLOSE-PW R-3-GP of the output cap 36 2D2R5F-2-GP 12 27 01 18 PW R_VDDQ_SNUB PG5127 CLOSE-PW R-3-GP DS SC22U6D3V5MX-L3-GP GAP-CLOSE-PW R-3-GP DS PC5120 SC22U6D3V5MX-L3-GP 12 2 PW R_1D2V DS SC22U6D3V5MX-L3-GP D DY SC2200P50V2KX-2GP SC22U6D3V5MX-L3-GP PG5125 SC22U6D3V5MX-L3-GP GAP-CLOSE-PW R-3-GP G SC22U6D3V5MX-L3-GP 12 PU5105 DY DY AON7506-GP PG5126 GAP-CLOSE-PW R-3-GP 65 BOM 12 4 PG5128 GAP-CLOSE-PW R-3-GP 84.07506.037 12 1-GP PG5129 GAP-CLOSE-PW R-3-GP tro-X PR5116 from 12.1Kohm change to 15.8Kohm(64.15825.6DL) to setting VDDQ =1.2V 12 Due to pin 11 VID is pull high, Vref. should be 0.675V by power team Edward 1/30 PG5130 GAP-CLOSE-PW R-3-GP 12 R1/R2 ) + 12.1K / 20K) 75 V 75 V form n Design Current = 700mA 2D5V_PW R 2D5V_PW R 2D5V_S3 PG5152 12 PC5153 GAP-CLOSE-PW R PG5151 DY 21 21 PC5154 12 A 21 21 SC22U6D3V5MX-2GP GAP-CLOSE-PW R SC68P50V2JN-1GP <Core Design> PR5154 Wistron Corporation 20KR2F-L-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Vout=0.8V*(R1+R2)/R2 Taipei Hsien 221, Taiwan, R.O.C. Title RT8231_VDDQ/VTT Size Document Number Rev A2 Vegas SKL/KBL-U A00 D ate: Monday, June 27, 2016 Sheet 51 of 105 2 1

A EletBC 4 (Blanking 3 BC 2 1 A

C DE 4 g) 3 C tro-X 2 <Core Design> Wistron Corporation 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title (Reserved) Size Document Number Rev A4 Vegas SKL/KBL-U A00 Date: Thursday, June 16, 2016 Sheet 52 of 105 D E

5 4 3 SSID = PWR.Plane.Regulator_1p0v D DCBATOUT PW R_DCBATOUT_1D0V PG5301 GAP-CLOSE-PW R-3-GP 12 PG5302 GAP-CLOSE-PW R-3-GP 12 AOZ2262 for 1D0V 5V_S5 DCR=5~ C IDC=15 PC5302 21 PU5301 SC4D7U25V5KX-L2-GP 21 21 21 VCC LX#18 18 PW R_1D0V_PH PW R_DCBATOUT_1D0V LX#17 17 LX#16 16 PW R_1D0V_BT Elet 2 1 21 PC5310 7 IN#7 LX#11 11 PW R_1D0V_VFB PC5304 21 8 IN#8 LX#10 10 SCD1U25 21 9 IN#9 PC5309 BST 20 2 6 TON PC5308 PR5301 1 PGOOD FB 5 SCD1U25V2KX-L-GP 95K3R2F-GP 2 EN 3 PFM# AGND 4 12 PW R_1D0V_TON 22 SS PW R_1D0V_PG PGND 19 PGND 14 SC10U25V5KX-L-GP PW R_1D0V_EN PGND 13 SC10U25V5KX-L-GP PGND 12 PGND 15 PW R_1D0V_PFM PW R_1D0V_SS PR5303 AOZ2262QI-10-GP-U 100KR2F-L3-GP 074.02262.0043 PC5313 B SCD01U50V2KX-L-GP 5V_S5 DY 21 PR5308 100KR2J-1-GP 40 1D0V_S5_PW RGD PR5305 1 2 PW R_1D0V_PG 17,40,45,54 3V_5V_POK 0R0402-PAD 2 PW R_1D0V_EN PR5306 1 0R0402-PAD PC5314 SC1KP50V2KX-L-1-GP 21 A 543

21 D PW R_1D0V 1D0V_S5 PG5304 GAP-CLOSE-PW R-3-GP 12 PG5305 GAP-CLOSE-PW R-3-GP 12 PG5306 GAP-CLOSE-PW R-3-GP 12 PG5307 GAP-CLOSE-PW R-3-GP 12 ~5.5mohm design current : 8.92A PG5308 C 5.5A, Isat=25A GAP-CLOSE-PW R-3-GP B 5V2KX-L-GP 12 PR5309 PL5301 PW R_1D0V PG5309 DY2D2R5F-2-GP COIL-1UH-34-GP-U1 GAP-CLOSE-PW R-3-GP 12 12 68.1R01A.20B PG5311 GAP-CLOSE-PW R-3-GP 21 21 12 21 21 PG5312 21 GAP-CLOSE-PW R-3-GP 12 PC5301 PC5303 PC5305 PC5307 PC5306 12 tro-X PG5310 DY GAP-CLOSE-PW R-3-GP 21 2 1 PW R_1D0V_SNUB PW R_1D0V_VFB_A SC22U6D3V5MX-L3-GP PG5313 SC22U6D3V5MX-L3-GP GAP-CLOSE-PW R-3-GP DY PC5315 SC22U6D3V5MX-L3-GP SC2200P50V2KX-2GP SC22U6D3V5MX-L3-GP 12 SC22U6D3V5MX-L3-GP PG5314 GAP-CLOSE-PW R-3-GP 12 21 21R1PR530221 DY 2K55R2F-GP PC5312 SC220P50V2KX-3GP R2PR5304 Vo=0.8x(1+R1/R2) =0.8x(1+7.5/30) 10KR2F-2-GP =1.00 <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title AOZ2262QI_1D0V Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 53 of 105 21

5 43 Main Func = 1D8V APL5930 for 1 D 5V_S5 3D3V_S5 C PR5402 21 PC5401 100KR2F-L1-GP 21 SC1U50V3KX-GP DY PC5406 SC4700P50V2KX-1GP PH at Page40 21 21 Elet 40 1D8V_S5_PWROK PR5408 1 2 0R0402-PAD PW R_1D8V_POK PW R_1D8V_EN 17,40,45,53 3V_5V_POK 1 PR5406 2 0R0402-PAD PR5401 DY DY [#544669 Rev0.53] 47KR2J-2-GP B A 543

321 1D8V_S5 1D8V_PW R 1D8V_S5 D C PG5405 12 GAP-CLOSE-PW R PG5406 12 GAP-CLOSE-PW R PG5407 12 3D3V_S5 GAP-CLOSE-PW R PC5403 SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC68P50V2JN-1GP 16K5R2F-2-GP SC10U6D3V3MX-GP tro-X 1D8V_PW R Design Current = 665mA 21 1.8V_RUN_FBPU5401 21 21 6 21VCNTLVIN#55 7 21POKVOUT#44 8 21ENVOUT#33 9 VIN#9 2 FB 1 GND PR5403 PC5405 APL5930KAI-TRG-GP DY PC5404 PC5402 74.05930.03D DY 2ND = 74.G9731.03D B PR5404 13KR2F-GP Vout=0.8V*(R1+R2)/R2 <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title LDO-V1D5V&V1D8V Size Document Number Rev A4 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 54 of 105 3 21

5 4 3 Main Func = LCD LCDVDD_LCD LCDVDD INVERTER POWER LCD1 R5523 DCBATOUT 43 EE note: Never 12 to short pad after MP 41 0R5J-5-GP 1 change R5211 2 LCDVDD_LCD DBC_EN_R R5518 2 DBC_PANEL_EN 20 F5503 3 C5536 1 12 4 5 DCBATOUT_LCD 100R2J-2-GP POLYSW -1D1A24V-G D6 Trace width = 80mil 7 69.50007.A31 8 DBC_EN_R 9 EDP_HPD_CONN 21C5538 SCD1U16V2KX-3GP CAMERA_DET#_R 1 R5501 2 CAMERA_DET# 20 3D3V_S0 10 LCD_TST_C 12 0R0402-PAD 11 eDP_AUX_CON_P SC1U10V2KX-1GP LCD 2 12 1 12 eDP_AUX_CON_N Camera add for camera detect pin 1/25 13 14 eDP_TX_CON_N0 For ESD R5521 15 eDP_TX_CON_P0 10KR2J 16 17 eDP_TX_CON_N1 R5525 18 eDP_TX_CON_P1 19 PANEL_SIZE_ID_CONN 1 DY 2 20 LCD_BRIGHTNESS 21 BLON_OUT_C 100R2J-2-GP For AU 22 PANEL_SIZE_ID_CONN 20140815 david 23 R5526 24 PU/PD FOR AUX CHANNEL DY 0R2J-2 25 26 SKL PDG (#543016): for AUXN 27 Recommends having a pull-up resistor of 100 kΩ 28 DMIC_CLK_EDP MIC_GND and a pull-down resistor of 100 kΩ for AUXP 29 DMIC_DATA_EDP 3D3V_CAMERA_S0 between the AC capacitor and the connector, 30 to assist source detection by the sink device. 31 USB_CAMERA_PN4 32 USB_CAMERA_PP4 eDP_AUX_CON_P R5528 1 DY 2 100KR2J-1-GP 3D3V_S0 33 eDP_AUX_CON_N R5529 1 DY 2 100KR2J-1-GP 34 CAMERA_DET#_R 35 USB_CON_PN6 Touch Panel 36 USB_CON_PP6 37 RN5502 BKLT_CTRL 38 TP_RS 18 BLON_OUT_C 39 TP_RESET 27 EDP_HPD C 40 36 TPAN_VDD 45 42 Layout Note: SRN100KJ-5-GP R5524 1 DY 2 0 44 Colse to LCD1. IPEX-CON40-3-GP LCD_BRIGHTNESS 1 R5531 2 RN5503 D5503 1 0R0402-PAD 1 3 2 20.F1407.040 2 3 LCD_TST_C 4 8 BKLT_CTRL LCD_TST_R 24 LCD_BRIGHTNESS 7 BLON_OUT_C SRN100J-4-GP 6 BLON_OUT 24 5 EDP_HPD_CONN EDP_HPD 8 MIC_GND BAT54C-7-F-3 EC5504 75.00054. SC22P50V2JN-4GP 2nd = 83.R DY21 3D3V_S0 5V_S0 3rd = 75.00 12 8 eDP_TX_CPU_N0 C5508 1 2 SCD1U16V2KX-3GP eDP_TX_CON_N0 21DY 0R3J-0-U-GP R5527 8 eDP_TX_CPU_P0 C5532 1 2 SCD1U16V2KX-3GP eDP_TX_CON_P0 21R55220R0603-PAD 8 eDP_TX_CPU_N1 2 SCD1U16V2KX-3GP eDP_TX_CON_N1 Elet 8 eDP_TX_CPU_P1 C5534 1 2 SCD1U16V2KX-3GP eDP_TX_CON_P1 69.50007.A31 C5537 1 F5502 POLYSW 1 DY 2 TPAN_VDD_F R5520 2 1 0R3 B 8 eDP_AUX_CPU_N C5533 1 2 SCD1U16V2KX-3GP eDP_AUX_CON_N 8 eDP_AUX_CPU_P C5531 1 2 SCD1U16V2KX-3GP eDP_AUX_CON_P Brightness R5530 2 eDP_BKLT_CTRL EE note: Never change R5232 to short pad af 1 Reserved for one time fuse: 69.43001.201 8 L_BKLT_CTRL 0R0402-PAD LCDVDD 8 EDP_VDD_EN D5502 1 LCDVDD_EN 3 R5506 24 LCD_VCC_TEST_EN 2 100KR2J-1-GP BAT54C-7-F-3-GP LCDVDD U5501 3D3V_S0 75.00054.E7D 1 EN VIN#5 5 C5505 2nd = 83.R2003.W81 2 GND VIN#4 4 SC4D7U6D3V3KX-GP 3 VOUT 3rd = 75.00054.A7D RT9724GB-GP 21 Layout Note: 74.09724.09F Trace width = 80mil A 54 3

3 2 1 Main Func = CAMERA DCBATOUT_LCD 800mA EE note: Never change R5229 to short pad after MP GP-U C5515 Reserved for one time fuse: 69.43001.201 tro-X C5535 SC1KP50V2KX-1GP 3D3V_S0 3D3V_CAMERA_S0 21DY 12 SCD1U50V3KX-GP R5532 C5543 1 SC2D2U10V3KX-1GP 2 D C 21 0R5J-5-GP SC33P50V2JN-3GP B 21 EC5503 DY 21 C5539 SC4D7U6D3V3KX-GP J-3-GP PANEL_SIZE_ID PANEL_SIZE_ID 20 UDIO Grade B or C selection. 2-GP R5533 0R0402-PAD 12 USB_CAMERA_PN4 USB_CPU_PN4 16 USB_CAMERA_PP4 USB_CPU_PP4 16 R5534 12 0R0402-PAD DMIC_DATA_EDP R5502 0R0402-PAD DMIC_DATA 27 DMIC_CLK_EDP 1 2 DMIC_CLK 27 1 2 0R2J-2-GP R5503 0R0402-PAD DY 21 21 DY SC6P50V2CN-1GP eDP_BKLT_CTRL EC5501 21 Layout Note: Reduce the stubs. 21 SC6P50V2CN-1GP EC_BRIGHTNESS 24 EC5502 3-GP EC (BIST MODE) .E7D R2003.W81 0054.A7D Main Func = Touch panel TPAN_VDD Touch Panel 1 W -1D1A24V-GP-U 3J-0-U-GP TP_RS 1 R5537 2 TOUCH_PANEL_INTR# 4,24 0R0402-PAD fter MP DY DY C5541 SC10P50V2JN-4GP TP_RESET 1 R5538 2 PLT_RST# 17,24,31,40,61,68,76,91 0R0402-PAD DY C5540 SC10P50V2JN-4GP R5535 0R0402-PAD 12 USB_CON_PN6 USB_CPU_PN6 16 USB_CON_PP6 12 USB_CPU_PP6 16 0R0402-PAD R5536 ED5501 USB_CON_PN6 1 I/O1 DYI/O4 6 USB_CON_PP6 TPAN_VDD 2 GND VDD 5 3 I/O2 4 A I/O3 21 DY C5501 <Core Design> SCD1U16V2KX-3GP AZC099-04S-2-GP Wistron Corporation 075.09904.0A7C 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title LCD&CAM&DMC&Touch Size Document Number Rev Custom Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 55 of 105 321

5 4 3 Main Func = CRT 5V_HDMI_S0 5V_CRT_S0_R 5V_CRT_S0_R CRT Connector D5604 VGA1 AVegas K SCD01U16V2KX-3GP C5623 RB551V30-GP 2 DY1 9 VCC_CRT NC#4 4 83.R5003.H8H NC#11 11 D CRT_DDCDATA_CON 12 DDCDATA_IDV1 egas GND 5 CRT_DDCCLK_CON 15 GND 6 DDCCLK_ID3 GND 7 CRT_R 1 GND 8 CRT_G 2 CRT_RED GND 10 CRT_B 3 CRT_GREEN GND 16 CRT_BLUE GND 17 CRT_VSYNC_CON 14 CRT_HSYNC_CON 13 VSYNC HSYNC Change the VGA connect by Andy D-SUB-15-156-GP 20.20985.015 1/14 DP_CRT_R EL5601 2 BLM18BB470SN1D-GP CRT_R CRT_DDCC CRT_G CRT_DDCD C 1 Vegas CRT_B DP_CRT_G DP_CRT_H EL5603 DP_CRT_V DP_CRT_B 1 Vegas C 2 BLM18BB470SN1D-GP EL5602 2 BLM18BB470SN1D-GP 1 Vegas 75R2F-2-GP2 1R5607 75R2F-2-GP2 1R5608 75R2F-2-GP2 1R5606 21 21 21 21 21 21 Elet Vegas 4K7R2J-2-GP Vegas Vegas C5618 SC15P50V2JN-2-GP Vegas C5614 SC15P50V2JN-2-GP Vegas C5619 SC15P50V2JN-2-GP Vegas C5613 SC15P50V2JN-2-GP Vegas C5611 SC15P50V2JN-2-GP Vegas C5612 SC15P50V2JN-2-GP Vegas Layout note: Layout note: R5607, R5608, R5606 need to close U5601 C5611 & C5612 & C5613 & C5614 & C5618 & C5619 & L5601 & L5602 & L5603 Trace length not over 300 mil need to close connect B U5601 2Vega1s VCCK_12 4 AVCC_12 Vegas AUX_P 2 PCH_DPC_AUXP_USCD1U16V2KX-3GP 2 1 C5624 VCCK_12 AUX_N 3 PCH_DPC_AUXN_U SCD1U16V2KX-3GP 2 1 C5625 SCD1U16V2KX-3GP C5620 AVCC_33 VCC_33 LANE0_P 5 PCH_DPC_P0_USCD1U16V2KX-3GP 2Vega1s VCCK_12 25 LANE0_N 6 PCH_DPC_N0_U SCD1U16V2KX-3GP VVeegg11 CCaa55ss660051 SCD1U16V2KX-3GP2Vega1s C5609 AVCC33 1 LANE1_P 7 PCH_DPC_P1_USCD1U16V2KX-3GP 2 SC2D2U10V3KX-1G2VPega1s C5608 LANE1_N 8 PCH_DPC_N1_U SCD1U16V2KX-3GP 2 SCD1U16V2KX-3GP C5606 17 5V_S0 2 VVeegg11 CCaa55ss660043 19 DP_CRT_HSYNC_CON 2 2Vega1s 3D3V_S0 14 18 DP_CRT_VSYNC_CON SCD1U16V2KX-3GP C5626 21 DP_CRT_B Vegas 22 DP_CRT_G 2Vega1s VDD_DAC_33 20 VDD_DAC_33 HVSYNC_PW R 23 DP_CRT_R Vegas PVCC_33 HSYNC SCD1U16V2KX-3GP2Vega1s C5627 VSYNC SC10U6D3V3MX-G2PVega1s C5628 3D3V_S0 26 SCD1U16V2KX-3GP C5610 CRT_DDCCLK_CON_R 15 VGA_SCL BLUE_P CRT_DDCDATA_CON_R 16 VGA_SDA GREEN_P RED_P 12,13,18,65,67 PCH_SMBCLK 30 SMB_SCL LDO_RSTB 27 EXT_CLK_IN_CRT 12,13,18,65,67 PCH_SMBDATA 29 SMB_SDA EXT_CLK_IN 28 CRT_PCH_HPD EXT1.2V_CTRL 31 3D3V_S0 SPI_CLK_CRT 11 GPI1/SPI_CLK 32 GPI2/SPI_SI HPD R5604 GPI3/SPI_SO 24 GND 33 POL1/SPI_CEB GND POL2 12 21 SPI_SI_CRT 12 SPI_SO_CRT 13 R5616 4K7R2J-2-GP R5601 DY 2Vegas 1 POL1/SPI_CEB10 POL2 9 4K7R2J-2-GP A 4K7R2J-2-GPVegas RTD2166-CGT-GP POL2 071.02166.0003 543

21 For EMI R2 SPEC Reserved AZ5725-01FDR7G-GP D CRT_B C AZ5725-01FDR7G-GP CRT_R AZ5725-01FDR7G-GP CRT_G 145V_CRT_S0_R ED5603 ED5602 ED5601 23 DY DY DY 21 21 21 RN5601 Vegas 83.05725.0A0 83.05725.0A0 83.05725.0A0 SRN2K2J-1-GP CRT_DDCDATA_CON CRT_DDCCLK_CON CLK_CON_R R5602 12 0R0402-PAD CRT_DDCCLK_CON 5V_CRT_S0_R 1 AFTP5604 AFTE14P-GP DATA_CON_R R5603 12 0R0402-PAD CRT_DDCDATA_CON CRT_VSYNC_CON 1 AFTP5602 AFTE14P-GP CRT_HSYNC_CON 1 AFTP5603 AFTE14P-GP HSYNC_CON R5612 1 Vegas2 47R2J-2-GP CRT_HSYNC_CON CRT_DDCDATA_CON 1 AFTP5609 AFTE14P-GP VSYNC_CON R5611 1 Vegas2 47R2J-2-GP CRT_VSYNC_CON CRT_DDCCLK_CON 1 AFTP5608 AFTE14P-GP CRT_R 1 AFTP5605 AFTE14P-GP CRT_PCH_HPD R5605 12 0R0402-PAD CPU_DP2_HPD 8 CRT_G 1 AFTP5607 AFTE14P-GP CRT_B 1 AFTP5606 AFTE14P-GP 3D3V_S0 3D3V_S0 AVCC33 DY DY DY 3D3V_S0 VDD_DAC_33 2 tro1-X R5613 SPI_CLK_CRT R5609 R5610 2 21 1 1 4K7R2J-2-GP 21 R5614 SPI_SI_CRT 212 21 4K7R2J-2-GP 12 0R0603-PAD C5621 R5615 SPI_SO_CRT 12 SC10U6D3V3MX-GP 210R0603-PADC5615Vegas 21 21Vegas SC10U6D3V3MX-GP 21 B PCH_DPC_AUXP 8 CRT_HSYNC_CON PCH_DPC_AUXN 8 CRT_VSYNC_CON CRT_DDCDATA_CON PCH_DPC_P0 8 5V_S0 CRT_DDCCLK_CON PCH_DPC_N0 8 PCH_DPC_P1 8 DY SC100P50V2JN-3GPDYDY C5607 PCH_DPC_N1 8 C5622 DY SC100P50V2JN-3GP SC18P50V2JN-1-GP C5629 Vegas Vegas C5616 C5602 SC18P50V2JN-1-GP C5617 SC4D7P50V2BN-GP SCD1U16V2KX-3GP Layout note: close to pin17 <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CRT Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 56 of 105 1 2

5 4 3 Main Func = HDMI 8 HDMI_CLK# C5701 1 2 SCD1U16V2KX-3GP HDMI_CLK#_R HDMI_CLK#_R 8 HDMI_CLK C5704 1 2 SCD1U16V2KX-3GP HDMI_CLK_R 8 HDMI_DATA0# 2 SCD1U16V2KX-3GP HDMI_DATA0#_R HDMI_CLK_R D 8 HDMI_DATA0 C5705 1 2 SCD1U16V2KX-3GP HDMI_DATA0_R HDMI_DATA2#_R C5703 1 8 HDMI_DATA1# 2 SCD1U16V2KX-3GP HDMI_DATA1#_R 8 HDMI_DATA1 C5707 1 2 SCD1U16V2KX-3GP HDMI_DATA1_R 8 HDMI_DATA2# C5706 1 2 SCD1U16V2KX-3GP HDMI_DATA2#_R 8 HDMI_DATA2 2 SCD1U16V2KX-3GP HDMI_DATA2_R C5708 1 C5709 1 5V_S0 RN5703 18 RN5701 SRN470J-3-GP 27 SRN470J-3-GP Q5701 36 G 45 12 R5719 D HDMI_PLL_GND 18 1 DY 27 2 S 36 HDMI_DATA2_R 45 100KR2J-1-GP 2N7002K-2-GP R5707 DY 0R2J-2-GP 84.2N702.J31 2ND = 84.2N702.031 5V_S0 C 3rd = 84.07002.I31 3 69.50007.691: D5701 OBS REASON: Please transfer to down size item 69.48001.081 for cost reduction and good cost down trend BAW 56-9-GP 75.00056.07D 5V_S0 5V_HDMI_S0 DDC_CLK_PH1 2 3 DDC_DATA_PH2 1 F5701 12 POLYSW -1D1A6V-9-GP-U R5718 69.48001.081 3D3V_S0 14 Elet 12 2ND = 69.50011.081 RN5702 3RD = 69.50013.061 SRN2K2J-1-GP DY Q5702 DDC_CLK_HDMI 0R3J-0-U-GP 4 5 2 8 CPU_DP1_CTRL_CLK 3 2 61 B 2N7002KDW -GP 8 CPU_DP1_CTRL_DATA DDC_DATA_HDMI 84.2N702.A3F 2nd = 84.2N702.E3F 3rd = 75.00601.07C EMI Request: HDMI_DATA1#_R_C HDMI_DATA0#_R_C HDMI_DATA1_R_C HDMI_DATA0_R_C HDMI_DATA2#_R_C HDMI_CLK_R_C HDMI_DATA2_R_C HDMI_CLK#_R_C ED5701 10 1 ED5702 10 1 9 29 2 7 6 3 3 8 DY 7 8 DY 4 4 A 56 5 RCLAMP0524P-2-GP RCLAMP0524P-2-GP 75.00524.A73 75.00524.A73 543

21 ER5706 HDMI_CLK#_R_C HDMI_DATA0#_R ER5713 HDMI_DATA0#_R_C 12 12 R5702 R5701 0R0402-PAD 150R2J-L1-GP-U 0R0402-PAD 150R2J-L1-GP-U ER5714 21 21 D 12 C HDMI_CLK_R_C HDMI_DATA0_R ER5715 HDMI_DATA0_R_C 0R0402-PAD HDMI_DATA2#_R_C HDMI_DATA1#_R 12 HDMI_DATA1#_R_C R5717 12 0R0402-PAD 0R0402-PAD ER5705 12 ER5716 12 0R0402-PAD 0R0402-PAD 21 R5703 21 R5708 150R2J-L1-GP-U 150R2J-L1-GP-U HDMI_DATA2_R_C HDMI_DATA1_R ER5704 HDMI_DATA1_R_C 12 DDC_CLK_HDMI 5V_HDMI_S0 0R0402-PAD DDC_DATA_HDMI C5702 HDMI CONN SCD1U16V2KX-3GP HDMI1 18 +5V_POW ER SCL 15 SDA 16 7 21 HDMI_DATA0_R_C 9 TMDS_DATA0+ CEC 13 HDMI_DATA0#_R_C 4 TMDS_DATA0- DDC/CEC_GROUNG 17 HDMI_DATA1_R_C 6 TMDS_DATA1+ HOT_PLUG_DETECT 19 HDMI_DATA1#_R_C 1 TMDS_DATA1- HDMI_DATA2_R_C 3 TMDS_DATA2+ RESERVED#14 14 HDMI_DATA2#_R_C TMDS_DATA2- 8 20 tro-X HDMI_CLK_R_C 5 TMDS_DATA0_SHIELD 21 HDMI_CLK#_R_C 2 TMDS_DATA1_SHIELD 22 TMDS_DATA2_SHIELD 23 11 10 TMDS_CLOCK_SHIELD GND 12 GND TMDS_CLOCK+ HDMI GND TMDS_CLOCK- (A_Type) GND SKT-HDMI23-168-GP 022.10025.0161 HPD_HDMI_CON 3D3V_S0 84.T3904.H11 B R5710 150KR2F-L-GP 1 Q5703 2 1E C 21 R5712 B HDMI_HPD_B 2 1 LMBT3904LT1G-GP 8 CPU_DP1_HPD 2 HDMI_HPD_E R5711 DDC_CLK_HDMI 200KR2F-L-GP DDC_DATA_HDMI HPD_HDMI_CON 0R0402-PAD 2 R5709 10KR2J-3-GP ED5703 10 1 9 2 7 6 3 8 DY 4 5 <Core Design> A RCLAMP0524P-2-GP Wistron Corporation 75.00524.A73 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title HDMI Size Document Number Rev A3 Date: Vegas SKL/KBL-U A00 Monday, June 27, 2016 Sheet 57 of 105 1

5 Elet43 D (Blanking) C 43 B A 5

21 D C tro-X B <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title (Reserved) Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Thursday, June 16, 2016 Sheet 58 of 105 21

5 Elet43 D (Blanking) C 43 B A 5

21 D C tro-X B <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title (Reserved) Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Thursday, June 16, 2016 Sheet 59 of 105 21

5 4 3 16 HDD_DEVSLP Main Func = HDD S 5V_HDD_S0 R6002 12 5V_S0 0R0402-PAD HDD_DEVSLP_R E 16 SATA_TX_CPU_P0 80 mils 1 R6001 2 16 SATA_TX_CPU_N0 0R0805-PAD-2-GP-U 16 SATA_RX_CPU_N0 16 SATA_RX_CPU_P0 21C6002 C6001 C6008 C6007 21 DY 21DY SCD22U10V2KX-1GP 2 1C 21 SCD22U10V2KX-1GP 2 1C Elet SCD22U10V2KX-1GP 1 2C SCD1U16V2KX-3GP SCD22U10V2KX-1GP 1 2C SC10U6D3V3MX-GP SCD1U16V2KX-3GP SC10U10V5KX-2GP Close to HDD1 Layout Note: 67 FFS_IN D Place near HDD1 ED6001 SATA_TX_CON_P0 1 LINE_1 NC#10 10 SATA SATA_TX_CON_N0 2 9 SATA 3 GLINNDE_2DY NC#9 8 SATA_RX_CON_N0 4 GND 7 SATA SATA_RX_CON_P0 5 6 SATA LINE_3 NC#7 LINE_4 NC#6 AZ1045-04F-R7G-GP 75.01045.073 Swap based on the swap report. Main Func = ODD C For NOVA if use ODD2,the cable need to add ont type ODD2 21 1 2 3 1 SATA_ODD_DA#_C2 4 TPAD14-OP-GP TP6002 ODD_PW R_5V 5 6 7 8 9 NOVA_ODD2 10 R6005 11 0R2J-2-GP 12 16 SATA_ODD_PRSNT# NO2VA_ODD12 SATA_ODD_PRSNT#_R2 13 14 16 SATA_ B 16 SATA_RX_CPU_P1 SCD01U50V2KX-1GP 2 1 C6015 SATA_RX_CON_P2 15 16 SATA_ 16 SATA_RX_CPU_N1 SCD01U50V2KX-1GP 2 1 C6012 SATA_RX_CON_N2 16 16 SATA_T 17 16 SATA_T 16 SATA_TX_CPU_N1 SCD01U50V2KX-1GP 2 1 C6016 SATA_TX_CON_N2 18 16 SATA_TX_CPU_P1 SCD01U50V2KX-1GP 2 1 C6017 SATA_TX_CON_P2 19 20 22 NOVA_ODD2 ACES-CON20-30-GP-U1 NOVA_ODD2 NOVA_ODD2 NOVA_ODD2 20.K0708.020 SWAP by Andy 1/22 A 543

2 1 E SATA HDD Connector D C6005 SATA_TX_CON_P0 HDD1 C6006 SATA_TX_CON_N0 14 C6004 SATA_RX_CON_N0 12 C6003 SATA_RX_CON_P0 11 10 HDD_DEVSLP_R 9 5V_HDD_S0 8 7 NT2_Q 6 5 4 3 2 1 13 STAR-CON12-1-GP 020.K0125.0012 _TX_CON_P0 _TX_CON_N0 _RX_CON_N0 _RX_CON_P0 5V_HDD_S0 1 AFTP6001 AFTE14P-GP 5V_S0 R6003 ODD_PW R_5V ODD Connector 12 0R0805-PAD ODD1 tro-X C6018 21 21 C6009 C B ODD ODD SCD1U16V2KX-3GP SC10U6D3V3MX-GP 20 22 19 TPAD14-OP-GP TP6001 1 SATA_ODD_DA#_C 18 ODD ODD_PW R_5V 17 16 21 16 SATA_ODD_PRSNT# R6004 SATA_ODD_PRSNT#_R 15 0R0402-PAD 14 ODD 13 ODD 21 12 ODD 11 _RX_CPU_P1 ODD SCD01U50V2KX-1GP 2 1 C6011 SATA_RX_CON_P1 10 _RX_CPU_N1 SCD01U50V2KX-1GP 2 1 C6010 SATA_RX_CON_N1 9 TX_CPU_N1 SCD01U50V2KX-1GP 2 1 C6013 SATA_TX_CON_N1 8 TX_CPU_P1 SCD01U50V2KX-1GP 2 1 C6014 SATA_TX_CON_P1 7 6 5 4 3 2 1 ACES-CON20-30-GP-U1 20.K0708.020 <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title SATA IF_HDD/ODD Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 60 of 105 21

5 4 3 3D3V_W LAN_S0 Main Func = WLAN Reserved for NG 3D3V_S0 3D3V_S5 R R6118 1.1A 1 D Rc 24 HOST_DEBUG_TX R6115 1 1 R6117 2 R 0R0805-PAD-2-GP-U EE Note: SCD1U16V2KX-3GP For NFGG Debug C6103 Stuff Ra, Rb; D SCD1U16V2KX-3GP C6104 SC10U6D3V3MX-GP C6106 SCD1U16V2KX-3GP C6102 SC10U6D3V3MX-GP C6105 SCD1U16V2KX-3GP C6101 DY DY21DY DY 21 21 21 21 21 Elet Note:pin 76 and pin 77 need co W LAN1 NP2 NP2 3D3V_W LAN_S0 76 76 74 3_3V 72 3_3V RE 70 PEW AKE1#_0/3_3V R 68 CLKREQ1#_0/3_3V 66 PERST1#_0/3_3V 64 RESERVED#64 62 ALERT_0/3_3 TP6103 1 TPAD14-OP-GP E51_RX2 60 I2C_CLK_0/3_3 0R0402-PADW LAN_DISABLE#1 58 15 W IFI_RF_EN R6114 1 2 0R0402-PADBLUETOOTH_EN_NGFF 56 I2C_DATA_0/3_3 20 BLUETOOTH_EN 0R0402-PADPLT_RST_NGFF# 54 C R6113 1 2 52 W _DISABLE#1_0/3_3V 17,24,31,40,55,68,76,91 PLT_RST# 18 CL_CLK R6116 1 2 RESERVED/W _DISABLE#2_0/3_3V PEW AKE0 18 CL_DATA 50 PERST0#_0/3_3V 3.3V CLKREQ0 18 CL_RST# 48 SUSCLK/32KHZ_0/3_3V B 46 TPAD14-OP-GP TP6102 1 E51_RX1 44 COEX1_0/1_8V RE E51_TX1 42 CL_CLK_R 40 COEX2_0/1_8V R CL_DATA_R 38 R6109 1 DY 2 0R2J-2-GP CL_RST#_R 36 COEX3_0/1_8V R6119 1 DY 2 0R2J-2-GP 34 R6108 1 DY 2 0R2J-2-GP CLINK_CLK CLINK_DATA CLINK_RESET 3160 does not support C-Link GND 32 DP_ML0P 30 DP_ML0N 28 GND DP_HPD 26 DP_ML1P Module Key D DP_ML1N 24 GND D 22 DP_AUXP 20 DP_AUXN D 18 GND D 16 LED#2 D 3D3V_W LAN_S0 LED#1 3_3V 6 3_3V 4 2 SKT-NGFF75P-96-GP 062.10003.0621 Support: Intel Dual Ban AFTE14P-GP AFTP6101 1 3D3V_W LAN_S0 AFTE14P-GP AFTP6105 1 W LAN_CLKREQ_W L AFTE14P-GP AFTP6106 1 W LAN_DISABLE#1 AFTE14P-GP AFTP6107 1 BLUETOOTH_EN_N AFTE14P-GP AFTP6108 1 PLT_RST_NGFF# AFTE14P-GP AFTP6109 1 USB_CON_PN7 AFTE14P-GP AFTP6110 1 USB_CON_PP7 A 543

GFF Debug Card 2 1 USB_CON_PP7 USB_CPU_PP7 16 Ra 3D3V_W LAN_S0 R6111 1 DY 2 0R2J-2-GP 2 DY 2 E51_TX1 0R2J-2-GP 0R0402-PAD Rb D Card: C DY Rc. B ontact to GND USB_CON_PN7 R6110 2 USB_CPU_PN7 16 1 0R0402-PAD NP1 NP1 W LAN_W AKE TPAD14-OP-GP 77 77 1 TP6101 GND 75 EFCLKN1 73 W LAN_CLKREQ_W LAN# 1 R6112 2 CLKREQ_PCIE#1 18 REFCLKP1 71 0R0402-PAD GND 69 PETN1 67 PEG_CLK1_CPU# 18 PETP1 65 PEG_CLK1_CPU 18 GND 63 PERN1 61 PCIE_RX_CPU_N5 16 PERP1 59 PCIE_RX_CPU_P5 16 GND 57 0#_0/3_3V 55 PCIE_TX_CON_N5 16 0#_0/3_3V 53 PCIE_TX_CON_P5 16 GND 51 EFCLKN0tro-X 49 REFCLKP0 47 GND 45 USB_CON_PN7 PETN0 43 USB_CON_PP7 PETP0 41 GND 39 PERN0 37 PERP0 35 GND 33 PD_0/3_3V 31 GND 29 DP_ML2P 27 DP_ML2N 25 GND 23 DP_ML3P 21 DP_ML3N 19 DP_MLDIR 17 GND 7 USB_D- 5 USB_D+ 3 1 GND nd Wireless-AC 3160 LAN# GFF <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size NGFF_WLAN CONN Rev A3 Document Number A00 Vegas SKL/KBL-U Date: Monday, June 27, 2016 Sheet 61 of 105 21

A EletBC 4 (Blankin 3 BC 2 1 A

C DE 4 ng) 3 C tro-X 2 <Core Design> Wistron Corporation 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Reserved Rev A4 Document Number A00 Vegas SKL/KBL-U 105 Date: Thursday, June 16, 2016 Sheet 62 of D E

5 Elet43 D (Blankin C 43 B A 5

3 21 D ng) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title (Reserved) Size Document Number Rev A4 Vegas SKL/KBL-U A00 Date: Thursday, June 16, 2016 Sheet 63 of 105 2 1

5 4 3 Main Func = Power BTN Layout note: Po G6401 place to buttom G6402 place to top 3D3V_S5 LID_CLOSE#_C G640121 21 G6402 GAP-OPEN 1 AFTP6403 GAP-OPEN PW R1 DY LID 6 ED6401 24 LID_CL_SIO# RN6401 AZ5725-01FDR7G-GP LID_CLOSE#_C 4 24 KBC_PW RBTN# 14 KBC_PW RBTN#_C 3 23 2 D SRN100J-3-GP 21 3D3V_S5 1 SC1KP50V2KX-1GP C6401 5 SCD1U16V2KX-3GP 21 21 ACES-CON4-88-GP AFTP6404 1 DY EC6403 020.K0005.0004 DY Main Func = Battery LED 5V_S5 C Low actived from KBC GPIO Q6403 24 CHG_AMBER_LED# 1 R6405 2 CHG_AMBER_LED_R# B R1 E 0R0402-PAD R2 C AMBER_LED_BAT RN2418-GPR1 R2 084.02418.0011 Low actived from KBC GPIO 5V_S5 W HITE_LED_BAT Q6404 Elet 24 BATT_W HITE_LED# 1 R6404 2BATT_W HITE_LED_R# B E 0R0402-PAD C RN2418-GP 084.02418.0011 B Main Func = HDD LED 3D3V_S021 SATA HDD LED 24 SATA_LED# R6401 LOW actived from PCH GPIO 10KR2J-3-GP 16 SATA_LED#_R A HWHDLED 5 G HWHDLED D BATT_W HITE_LED_R# S Q6401 3rd = 84.07002.I31 2ND = 084.27002.0A31 84.2N702.J31 2N7002K-2-GP 43

2 1 ower button 1 AFTP6402 1 AFTP6401 D_CLOSE#_C For EMI Reserved D C EC6401 1DY 2 SCD1U16V2KX-3GP B R6407 BAT_AMBER Battery LED1(AMBER_LED) 12 422R2F-2-GP DY EC6402 tro-X2 1 SCD1U25V2KX-GP LED1 1+ Yellow - 3 2+ White R6406 2 BAT_W HITE LED-YW -5-GP 1 083.1212A.0070 Battery LED2 (WHITE_LED) 274R2F-GP DY EC640421 SCD1U25V2KX-GP <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title LED Board&Power Button Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 64 of 105 21

5 4 3 Main Func = KB Internal Keyboard Connector Main Func = TPAD AFTP6519 1 KB1 20 KB_DET# AFTP6523 1 KSI7 32 AFTP6511 1 KSI6 30 24 KSI[0..7] AFTP6521 1 KSI4 29 AFTP6533 1 KSI2 28 D 24 KSO[0..16] AFTP6513 1 KSI5 27 AFTP6540 1 KSI1 26 AFTP6502 1 KSI3 25 24 AFTP6507 1 KSI0 24 TP_VDD AFTP6536 1 KSO5 23 AFTP6522 1 KSO4 22 20.K0621.030 32 RN650 AFTP6534 1 KSO7 21 2nd= 20.K0592.030 41 SRN10 AFTP6512 1 KSO6 20 3nd= 20.K0565.030 AFTP6505 1 KSO8 19 AFTP6518 1 KSO3 18 Support PTP AFTP6517 1 KSO1 17 AFTP6510 1 KSO2 16 AFTP6520 1 KSO0 15 AFTP6538 1 KSO12 14 AFTP6508 1 KSO16 13 AFTP6515 1 KSO15 12 AFTP6535 1 KSO13 11 AFTP6539 1 KSO14 10 AFTP6516 1 KSO9 AFTP6506 1 KSO11 9 AFTP6503 1 KSO10 8 7 AFTP6537 CAP_LED 6 5 1 4 3 2 1 31 PTW O-CON30-10-GP PS2 24 CLK_TP_SIO 24 DAT_TP_SIO CAP LED Control Q6502 5V_S0 I2C 20 I2C0_SCL_TCH_PAD 20 I2C0_SDA_TCH_PAD LOW actived from KBC GPIO R1 R2 24 CAP_LED#_S 1 R6508 2 CAP_LED_R# E R6506 0R0402-PAD 1 B 2 CAP_LED 21 C CAP_LED_Q RN2418-GP 1KR2J-1-GP EC6503 DY 084.02418.0011 SC33P50V2JN-3GP AFTP6532 1 CAP_LED C 20 KB_DET# AFTP6552 1 32 30 AFTP6556 1 KSI7 29 NOVA AFTP6545 1 KSI6 28 AFTP6555 1 KSI4 27 Elet AFTP6557 1 KSI2 26 SMBUS AFTP6548 1 KSI5 25 AFTP6564 1 KSI1 24 12,13,18,56,67 PCH_SMBCLK AFTP6504 1 KSI3 23 12,13,18,56,67 PCH_SMBDATA AFTP6542 1 KSI0 22 AFTP6560 1 KSO5 21 Need to check with SW. AFTP6554 1 KSO4 20 AFTP6558 1 KSO7 19 AFTP6546 1 KSO6 18 AFTP6514 1 KSO8 17 AFTP6551 1 KSO3 16 AFTP6550 1 KSO1 15 AFTP6544 1 KSO2 14 AFTP6553 1 KSO0 13 AFTP6562 1 KSO12 12 AFTP6543 1 KSO16 11 AFTP6547 1 KSO15 10 AFTP6559 1 KSO13 AFTP6563 1 KSO14 9 AFTP6549 1 KSO9 8 AFTP6541 1 KSO11 7 AFTP6509 1 KSO10 6 5 AFTP6561 CAP_LED 4 3 1 2 1 31 B KB2 For NOVA 1/21 ACES-CON30-29-GP 020.K0254.0030 Keyboard Backlight (Reserved) 5V_S0 EE Note: Never change to short pad after MP Reserve location for Fuse: 069.50001.0051 (POLYSW 0603/0.5A/6V) +5V_KB_BL 1KBBL 2 21 0R3J-0-U-GP 21 R6504 KBBLC6501 SCD1U16V2KX-3GP 19 KB_LED_BL_DET_R R6503 KB_LED_DET_C KBBL1 C6502 5 1 KBBL 2 1 51KR2J-1-GP 21 2 KBBL KBBL R6507 DY SCD1U16V2KX-3GP KB_BL_CTRL# SD 3 100KR2J-1-GP 4 6 1 ACES-CON4-83-GP 020.K0206.0004 A AFTP6565 KB Backlight Power Consumption: 285mA max. KBBL Q6501 24 BKLGT_PW M DMN3404L-7-GP G 84.03404.C31 21 DY R6505 100KR2J-1-GP 54 3

3 21 3D3V_S0 3D3V_S5 TP_VDD 12 12 TP_VDD Discharge Circuit 0R0402-PAD PTP 21 R6522 R6520 100R3J-4-GP 0R2J-2-GP R6521 DY 3D3V_TP_S5_R TP_ON#_GATE Q6505 G C6503 DY D Q6205_Q SCD1U16V2KX-3GP TP_VDD R6509 S 12 1 2 TP_LOCK# TP_EN# TP_EN# 1KR2J-1-GP G D 100KR2J-1-GP 2N7002K-2-GP D S C 04 R6516 84.2N702.J31 B 0KJ-5-GP 1 2 TP_ON#_GATE 2ND = 84.2N702.031 3rd = 84.07002.I31 D G Q6504 Precision Touch Pad Connector DMP2130L-7-GP 84.02130.031 TP_VDD 2ND = 84.03413.A31 TP_VDD Pin number Pin name 1 VDD 3D3V_S0 R6517 DAT(I2C) 2 CLK(I2C) 1 2 C6504 3 GND 21 4 ATTN DY 5 GPIO 6 DAT(PS2) TP1 7 CLK(PS2) 8 0R3J-0-U-GP SCD1U16V2KX-3GP 2NON TP1_WAKE 9 1 RN6503 1 SRN33J-5-GP-U TPCLK_C R6513 I2C1_SDA_R 2 TPDATA_C 4K7R2J-2-GP I2C1_SCL_R 2 4 3 3 I2C1_SCL_R 4 I2C1_SDA_R 5 R6518 0R0402-PAD 4,24 INT_TP# TP_LOCK# 6 R6519 24 TP_LOCK# TPDATA_C 7 12 TPCLK_C 8 12 10 0R0402-PAD AFTP6531 1 SC33P50V2JN-3GP EC6502 SC33P50V2JN-3GP EC6504 SC33P50V2JN-3GP EC6501 DY 21 DY DY 5V_S0 STAR-CON8-2-GP 21 21 020.K0182.0008 21 Change TP1 pin define , pin1 connect VDD 1/26 R6512 TP_VDD Need to check if it is Active High or Active Low 0R0402-PAD and check if there is PH on TPAD side. RN6502 SRN2K2J-1-GP32 TP_VDD 41 Q6204_G PTP TP side has pull high 2N7002KDW -GP I2C1_SCL_R R6514 INT_TP# I2C1_SDA_R 2 1 I2C0_SCL_TCH_PAD 1 6 10KR2J-3-GP 84.2N702.A3F 2 PTP 5 2nd = 84.2N702.E3F 3rd = 75.00601.07C 34 tro-X Q6503 TP_VDD 1 AFTP6529 TPCLK_C 1 AFTP6530 I2C0_SDA_TCH_PAD TPDATA_C 1 AFTP6524 I2C1_SCL_R 1 AFTP6528 I2C1_SDA_R 1 AFTP6527 INT_TP# 1 AFTP6525 TP_LOCK# 1 AFTP6526 0R2J-2-GP 1 DY 2 R6515 I2C1_SCL_R 0R2J-2-GP 1 DY 2 R6511 I2C1_SDA_R 21 SC33P50V2JN-3GP 21 EC6506 DY DY SC33P50V2JN-3GP EC6505 A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Key Board&Touch Pad Size Document Number Rev Custom Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 65 of 105 321

5 4 3 Main Func = IO Connector I/O Board Con D Cardreader 33 USB_PN5_C USB3(USB2.0) 33 USB_PP5_C 37 USB_PN2_C 37 USB_PP2_C USB20_VCCA 3D3V_S0 AUD_AGND 29 AUD_PORTA_L_R_B Universal Jack 29 AUD_PORTA_R_R_B 29 SLEEVE_R C 29 RING2_R 29 JACK_PLUG AUD_AGND R6305 2 1 DY 0R3J-0-U-GP AUD_AGND Elet Pitch: 1mm Power: 6 p GND: 7 pin AGND: 2 Pi B USB_PN5_C 1 USB_PP5_C 1 USB_PN2_C 1 USB_PP2_C 1 RING2_R 1 AUD_PORTA_L_R_B 1 JACK_PLUG 1 AUD_PORTA_R_R_B 1 SLEEVE_R 1 USB20_VCCA 1 AUD_AGND 1 1 A 543

nnector 21 D 1 IOBD1 C 31 2 3 32 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 tro-X ACES-CON30-9-GP-U2 20.K0510.030 m pins ns ins B AFTP6601 AFTE14P-GP AFTP6602 AFTE14P-GP AFTP6603 AFTE14P-GP AFTP6604 AFTE14P-GP AFTP6605 AFTE14P-GP AFTP6606 AFTE14P-GP AFTP6607 AFTE14P-GP AFTP6608 AFTE14P-GP AFTP6609 AFTE14P-GP AFTP6610 AFTE14P-GP AFTP6611 AFTE14P-GP AFTP6612 AFTE14P-GP Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title IO Board Connector Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 66 of 105 21

5 4 3 SSID = User.interface Free Fall Sensor DVT1 add FFS 2/18 D 3D3V_S0 R6701 2 3D3V_RUN_FFS 1 FFS 0R3J-0-U-GP 21FFS SC10U6D3V3MX-GP5 2 2121 C6703 SCD1U16V2KX-3GP C6702 SCD1U16V2KX-3GP C6701 FFS DY U6701 9 VDD CS 2 10 VDD_IO RES 5 FFS INT1 12 INT2 11 12,13,18,56,65 PCH_SMBCLK 3D3V_RUN_FFS 1 SCL/SPC GND 6 12,13,18,56,65 PCH_SMBDATA 4 SDA/SDI/SDO GND 7 3 SDO/SA0 GND 8 3D3V_S0 C 21 LNG2DMTR-GP FFS R6703 074.LNG2D.00BZ 100KR2J-1-GP FALL_INT2 5V_S0 61 43Q6701 21 FFS 2N7002KDW -GP 84.2N702.A3F 2nd = 084.27002.003F 3rd = 84.2N702.E3F R6705 DY Elet 100KR2J-1-GP HDD 60 FFS_INT2_Q 2 DY 1 R6706 0R2J-2-GP B Note - no via, trace, under the sensor (keep out area around 2mm) - stay away from the screw hole or metal shield soldering joints - design PCB pad based on our sensor LGA pad size (add 0.1mm) - solder stencil opening to 90% of the PCB pad size - mount the sensor near the center of mass of the NB as possible as you can Note (1) Keep all signals are the same trace width. (included VDD, GND). (2) No VIA under IC bottom. A 543

2 1 D 3D3V_S021 C B DYR10607K0R2 2J-1-GP HDD_FALL_INT 18 tro-X 3D3V_S02 12 1 DYR10607K0R4 2J-1-GP FFS_INT2 20 PCH FFS R6707 1MR2J-1-GP 2014.04.24 Venrer suggest,reserve to prevent error trigger <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Free Fall Sensor Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 67 of 105 21

5 4 3 Main Func = Debug D Layout 18,24,91 LPC_LAD[3..0] LPC_LAD[3..0] LPC Place ne LPC LPC LPC LPC_LAD3 1 R6803 2 0R2J-2-GP LPC_LAD2 1 R6804 2 0R2J-2-GP LPC_LAD1 1 R6805 2 0R2J-2-GP LPC_LAD0 1 R6806 2 0R2J-2-GP 18,24,91 LPC_LFRAME# R6801 LP1 C 2 17,24,31,40,55,61,76,91 PLT_RST# L1PC 0R2J-2 R6802 2 0R2J-2-G C LPC de for CL Elet B A 543

321 Note: Debug Connector D C ear trace separated point 3D3V_S0 B 12 P LPC_LAD3_C LPC_LAD0_C 10 9 P LPC_LAD2_C LPC_LAD1_C 8 7 P LPC_LAD1_C LPC_LAD2_C 6 5 P LPC_LAD0_C LPC_LAD3_C 4 3 LPC_FRAME#_DEBUG 2 PLT_RST#_DEBUG 1 2-GP GP 18 CLK_PCI_LPC ebug pop R1804 11 LK_PCI_LPC DB1 PAD-ACES-CON10-14-GP ZZ.00PAD.GV1 tro-X 20.D0075.110: Dummy Pad with solder mask is ZZ.00PAD.Y41 DB1 Optional: New one smaller LPC connector is 20.F1180.010. <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Dubug connector Rev A4 Document Number A00 Vegas SKL/KBL-U Date: Monday, June 27, 2016 Sheet 68 of 105 321

5 Elet 43 D (Blanking) C 43 B A 5

321 D C tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Reserved Rev A4 Document Number A00 Vegas SKL/KBL-U Date: Thursday, June 16, 2016 Sheet 69 of 105 321

5 Elet43 D (Blanking) C 43 B A 5

321 D C tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title (Reserved) Size Document Number Rev A4 Vegas SKL/KBL-U A00 Date: Thursday, June 16, 2016 Sheet 70 of 105 321

5 Elet43 D (Blanking) C 43 B A 5

3 21 D ) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title RESERVED Rev Size Document Number A00 A4 Vegas SKL/KBL-U 105 Date: Thursday, June 16, 2016 Sheet 71 of 1 2

5 Elet43 D (Blanking C 43 B A 5

3 21 D g) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Document Number USB3.0 PORT Rev Size Vegas SKL/KBL-U A00 A4 Thursday, June 16, 2016 Sheet 72 of 105 Date: 21

5 Elet 43 D (Blanking) C 43 B A 5

321 D C tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Document Number Reserved Rev Size Vegas SKL/KBL-U A00 A4 Thursday, June 16, 2016 Sheet 73 of 105 Date: 321

5 Elet43 D (Bla C 43 B A 5

21 D C anking) tro-X B <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Reserved Rev A3 Document Number A00 Vegas SKL/KBL-U Date: Thursday, June 16, 2016 Sheet 74 of 105 21

5 Elet43 D (Bla C 43 B A 5

21 D C anking) tro-X B <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Reserved Rev A3 Document Number A00 Vegas SKL/KBL-U Date: Thursday, June 16, 2016 Sheet 75 of 105 21

5 4 3 Main Func = dGPU 16 PEG_TX_GPU_P0 16 PEG_TX_GPU_N0 D 16 PEG_TX_GPU_P1 16 PEG_TX_GPU_N1 C 16 PEG_TX_GPU_P2 16 PEG_TX_GPU_N2 16 PEG_TX_GPU_P3 16 PEG_TX_GPU_N3 B 21 DGPU_HOLD_RST# dGPU mode 3D3V_VGA_S0 2 1 Elet IGPU H IGPU with BACO R7625 18 PEG_CLK_CPU L 10KR2J-3-GP DY 18 PEG_CLK_CPU# H 2 R7623 1 R7601 2 OPS1 1KR2F-3-GP PW RGOOD_TEST 0R0402-PAD 20 DGPU_HOLD_RST# D7601 ATI_RST# 2 R7621 1 VGA_RST# 17,24,31,40,55,61,68,91 PLT_RST# 2 BAW 56-5-GP 0R0402-PAD C7609 1 DY 3 SC47P50V2JN-3GP DY A 543