Eletro-X_VEGAS TURIS SKL-KBL (15341-1 91N85)

21 Fan controller1 AFTP2602 1FAN_TACH1_C 5V_S0 AFTP2603 1FAN_VCC1 R2605 FAN261 0R2J-2-GP 1 DY 2 FON# 1 FSM# GND 8 2 VIN GND 7 5V_S0 3 VOUT GND 6 FAN_VCC1 4 VSET GND 5 tro-X FAN_TACH1 FAN_VCC1 21 21FAN_VCC124FAN1_DAC_1 21 AKEC2602EC2601APL5606AKI-TRG-GP D RB551V30-GP C DY 21SCD1U16V2KX-3GPDYLayout Note:74.05606.A71 C2603SC10P50V2JN-4GP SC2200P50V2KX-2GPNeed 10 mil trace width.2rd = 74.02113.0E1 21 C26053rd = 74.03940.A71 SCD1U16V2KX-3GP 2124FAN_TACH11 R2606 2FAN_TACH1_CFAN1 C26110R0402-PADFAN_VCC1 SC4D7U6D3V3KX-GP5 FAN_VCC1 3 2 D2601 1 Layout Note: C2604 DY DY 4 Signal Routing Guideline: SC4D7U6D3V3KX-GPDY ETY-CON3-11-GP Trace width = 15mil 020.F0283.0003 1 AFTP2601 83.R5003.H8H change the fan define & connect P/N 020.F0283.0003 by Andy 1/27 B <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title THERMAL NCT7718W/Fan Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 26 of 105 21

5 4 3 Main Func = Audio 3D3V_S0 +3V_AVDD Audio Co 1 R2731 2 0R0805-PAD 29 LINE1_VREFO_R 29 LINE1_VREFO_L D 25mA 29 AUD_HP1_JACK_L 1D8V_S0 R2726 CPVDD 29 AUD_HP1_JACK_R 12 C2701 0R0402-PAD SC4D7U6D3V3KX-GP Close pin36 C2714 C2704 21 1 SCD1U16V2KX-3GP 2 SC1U10V2KX-1GP 21 1.5A 21 C2703 CPVDD CPVDD 36 35 CBN 5V_S0 +5V_PVDD SC1U10V2KX-1GP 1 R2702 2 0R0805-PAD C2706 C2707 C2708 C2709 HDA27 21 1 R2704 2 DY SC10U6D3V3MX-GPDY 0R0805-PAD 21 SCD1U16V2KX-3GP CBP 37 CBP 21 SC10U6D3V3MX-GP AUD_AGND C2712 1 2 SC10U6D3V3MX-GP LDO2_CAP 38 AVSS2 AUD_AGND 39 LDO2-CAP 21 SCD1U16V2KX-3GP Layout Note: Layout Note: +3V_1D8V_AVDD 40 AVDD2 Close pin41 Close pin46 +5V_PVDD 41 PVDD1 AUD_SPK_L+ 42 SPK-OUT-L+ moat 43 SPK-OUT-L- AUD_SPK_L- 1D8V_S0 Layout Note: 29 AUD_SPK_L+ +3V_1D8V_AVDD 29 AUD_SPK_L- Speaker trace width >40mil @ 2W4ohm speaker power AUD_SPK_R- C 29 AUD_SPK_R- 44 SPK-OUT-R- R2713 3D3V_S0 1 2 0R0402-PAD 29 AUD_SPK_R+ AUD_SPK_R+ 45 SPK-OUT-R+ R2710 1 DY 2 0R2J-2-GP +5V_PVDD 46 PVDD2 PD# 47 PDB 21 24 EC_MUTE# 1 R2708 2 48 SPDIF-OUT/GPIO2/D SC4D7U6D3V3KX-GP 49 GND C2715 C2721 0R0402-PAD AUD_AGND 21 Close pin40 AVDD2: SCD1U16V2KX-3GP +3V_AVDD R2724 2 TP2701 +1.8VD@3246 1 +1.5VD@3234 1 DY COMBO-GPI 0R2J-2-GP TPAD14-OP-GP Azalia I/F EMI 1 DVDD 2 ALC3246-CG-GP-U +3V_AVDD HDA_CODEC_SDOUT 2El1et H D A_C O D EC _BIT C LK SCD1U16V2KX-3GP D MIC _D AT A 21 21 21 C2717 21 EC2708 EC2709 EC2701 C2716 SC4D7U6D3V3KX-GP Q4009_G55 DMIC_DATA22R2J-2-GP1 R27142D MIC _D AT A_R SC22P50V2JN-4GP 55 DMIC_CLK 22R2J-2-GP1 R2705 2 D MIC _C LK_R SC22P50V2JN-4GP B SC22P50V2JN-4GP C2723 12 19 HDA_CODEC_SDOUT 0R0402-PAD 1 R2719 2 HDA_SD SC22P50V2JN-4GP 19 HDA_CODEC_BITCLK 0R0402-PAD 0R0402-PAD 1 R2720 2 HDA_BI Close pin3 19 HDA_SDIN0 19 HDA_CODEC_SYNC HDA_CO 1 R2718 2 H D A_C O D EC _SYN C 1D8 3D3V_S0 1D8V_S5 21R2729 C2724 210R2J-2-GP SCD1U16V2KX-3GP DY 17,24,40,51 SIO_SLP_S3# 1 R2728 2 Q2702 G 0R0402-PAD D AS 2N7002K-2-GP 543

21 odec Chip ALC3246 MIC2_VREFO 29 moat D AUD_AGND C 1 C2705 SC4D7U6D3V3KX-GP 21 moat EC2707 1 2 SCD1U25V2KX-GP SC2D2U10V3KX-1GP EC2706 1 2 SCD1U25V2KX-GP 1 R2711 +5V_AVDD 5V_S0 EC2705 1 2 SCD1U25V2KX-GP C2702 100KR2J-1-GP EC2704 1 2 SCD1U25V2KX-GP EC2703 1 2 SCD1U25V2KX-GP CBN AUD_VREF 2 LDO1-CAP 27 LDO1_CAP 2 +5V_AVDD C2710 SCD1U16V2KX-3GPC2711 12 AUD_AGND CPVEE 34 CPVEE AUD_AGND 21 R2703 0R0603-PAD 1 2 SC4D7U6D3V3KX-GP R2706 0R0603-PAD 21 Layout Note: 1 2 Place close to Pin 26 R2727 0R0603-PAD HPOUT-R_PORT-I-R 33 HPOUT-L_PORT-I-L 32 LINE1-VREFO-L 31 LINE1-VREFO-R 30 MIC2-VREFO 29 VREF 28 AVDD1 26 AVSS1 25 1 2 R2730 0R0603-PAD AUD_AGND LINE2-L_PORT-E-L 24 AUD_AGND Layout Note: 23 LINE2-R_PORT-E-R 22 moat Tied at point only under 21 Codec or near the Codec 20 LINE1-L_PORT-C-L 19 LIN E1_L 29 3D3V_S5 18 LINE1-R_PORT-C-R 17 LIN E1_R 29 R2712 16 2 0R0402-PAD VD33STB 15 V3D3_STB 1 14 MIC2-CAP 13 MIC _C AP C2713 1 2 SC10U6D3V3MX-GP AUD_AGND Width>40mil, to improve Headpohone Crosstalk noise be better. Change it to sharp will trace layer change. Layout Note: Add 2 vias (>0.5A) when 071.03246.0003 MIC2-R_PORT-F-R/SLEEVE SLEEVE 29 MIC2-L_PORT-F-L/RING2 R IN G 2 29 R2723 moat 20KR2F-L-GP PCBEEP AUD_PC_BEEP_3246 12 AUD_PC_BEEP_R 0R0402-PAD SPDIFO/FRONT-JD_JD3/GPIO3 JDREF R2707 1 DY 2 AUD_AGND MIC2/LINE2-JD_JD2 DMIC-DATA34/DMIC-CLK-IN HP/LINE1-JD_JD1 AUD_SENSE_A 12 AUD_SENSE AUD_SENSE 29 +3V_AVDD R2709 Pin 13 GPIO0/DMIC-DATA12tro-X Layout Note: R2722 200KR2F-L-GP 2 Place close to 3 GPIO1/DMIC-CLK AUD_SENSE_A 1 5 SDATA-OUT 7 LDO3-CAP 9 DVDD-IO 11 I2C-DATA moat 100KR2J-1-GP 8 SDATA-IN 10 SYNC DC_DET 6 BCLK 12 I2C-CLK +3.3VD@3234 follow Pin1 Power setting@3246 4 1DVSS +3V_AVDD 0R2J-2-GP 1 LDO3_CAP 21 R2721 C2718 SCD1U16V2KX-3GP C2719 DY 2 DOUT_CODEC_R IT C LK_C O D EC _R 2 19 SPKR RN2701 3 HDA_SPKR_R 2 D2701 C2720 O D EC _SD IN 0 SC4D7U6D3V3KX-GP 24 BEEP 4 KBC_BEEP_R 1 3 AUD_PC_BEEP_C 1 2AUD_PC_BEEP_R 2 1 SCD1U16V2KX-3GP SRN1KJ-7-GP 21 BAT54C-7-F-3-GP B 75.00054.E7D R2717 2nd = 83.R2003.W81 2K2R2J-2-GP 3rd = 75.00054.A7D 8V_S5 1D8V_S0 R2701 2 1 DY 0R3J-0-U-GP Q2701 1D8V_S0 DMP2130L-7-GP 150mA S D SCD1U16V2KX-3GP D G 1D8V_EN# 2 1 21 G 21 R2715 C2722 C2725 10KR2J-3-GP SCD22U10V2KX-1GP DY R2733 2 1D8V_EN_R# 1 4K7R2J-2-GP 84.02130.031 2nd = 84.00102.031 3rd = 84.03413.B31 A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Audio Codec ALC3246 Size Document Number Rev A2 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 27 of 109 21

5 Elet43 D (Blankin C 43 B A 5

3 21 D ng) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size (Reserved) Rev A4 Document Number A00 Vegas SKL/KBL-U 105 Date: Thursday, June 16, 2016 Sheet 28 of 2 1

5 43 Main Func = Audio Layout Note: D Speaker trace width >40mil @ 2W4ohm speaker power 27 AUD_SPK_R+ 0R0603-PAD-2-GP-U 2 R2904 1 27 AUD_SPK_R- 0R0603-PAD-2-GP-U 2 R2903 1 27 AUD_SPK_L+ 0R0603-PAD-2-GP-U 2 R2902 1 27 AUD_SPK_L- 0R0603-PAD-2-GP-U 2 R2901 1 SC1KP50V2KX-1GP EC2901 21 SC1KP50V2KX-1GP EC2902 21 SC1KP50V2KX-1GP EC2903 21 SC1KP50V2KX-1GP EC2904 21 C RN2901 27 MIC2_VREFO SRN2K2J-1-GP 3 4 2 1 27 RING2 R2908 1 2 10R2F-L-GP AUD_HP1_JACK_L1 R2922 1 2 1KR2J-1-GP AUD_HP1_JACK_R1 27 AUD_HP1_JACK_L C2907 1 2 LINE1-L_C R2912 1 2 4K7R2J-2-GP C2908 1 SC4D7U6D3V3KX-GP 27 LINE1_L R2910 1 2 10R2F-L-GP 2 LINE1-L_R R2921 1 2 1KR2J-1-GP 27 LINE1_VREFO_L SC4D7U6D3V3KX-GP R2913 1 2 4K7R2J-2-GP 27 AUD_HP1_JACK_R 21 21 27 LINE1_R 21 27 LINE1_VREFO_R 2 R29191 10KR2J-3-GP 2 1Elet 27 SLEEVE SC100P50V2JN-3GP EC2906 DY SC100P50V2JN-3GP EC2907 SC100P50V2JN-3GP EC2908 SC100P50V2JN-3GP R2920 10KR2J-3-GP DY DY DY D DY B AUD_AGND AUD_ A 543

21 Speaker AUD_SPK_R+_C SPK1 CONN Pin Net name D 5 Pin1 SPK_R+ C AUD_SPK_R-_C Pin2 SPK_R- B AUD_SPK_L+_C 1 Pin3 SPK_L+ AUD_SPK_L-_C Pin4 SPK_L- 2 3 4 6 ACES-CON4-29-GP 20.F1639.004 2nd = 20.F1804.004 AUD_SPK_L-_C 1 AFTP2901 AUD_SPK_L+_C 1 AFTP2902 AUD_SPK_R-_C 1 AFTP2903 AUD_SPK_R+_C 1 AFTP2904 Universal Jack (Moved to I/O Board) 2 R2906 1 0R0603-PAD-2-GP-U RING2_R RING2_R 66 2 R2907 1 0R0603-PAD-2-GP-U AUD_PORTA_L_R_B JACK_PLUG 2 R2909 1 0R0603-PAD-2-GP-U AUD_PORTA_R_R_B 2 R2911 1 0R0603-PAD-2-GP-U SLEEVE_R 2 1 tro-X AUD_PORTA_L_R_B 66 21JACK_PLUG 6666 AUD_PORTA_R_R_B SLEEVE_R 66 EC2905 DY Delay circuit (JACK_PLUG_DET: on IO Board) _AGND JACK_PLUG 10 mils 0R0603-PAD-2-GP-U 1 R2923 2 10 mils AUD_SENSE 27 DY C2902 SC10U6D3V3MX-GP AUD_AGND <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Audio IO Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 29 of 105 21

5 Elet43 D (Blanki C 43 B A 5

3 21 D ing) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title (Reserved) Size Document Number Rev A4 Vegas SKL/KBL-U A00 Date: Thursday, June 16, 2016 Sheet 30 of 1 105 2

5 4 3 Main Func = LAN Layout: Ca: colse to Pin8 LAN CH For RTL8111G(S) Cb close to Pin30 * Place Ca~Cd close to each VDD10 pin-- 8, 30, 3, 22 Cc: close to Pin3 For RTL8106E Cd: close to Pin22 * Place Ca,Cb close to each VDD10 pin-- 8, 30 R3101 REGOUT Ra VDD10 D 12 C3101,R3101: 8111G Only for 0R3J-0-U-GP LAN_SW 21 21 8111G/LAN_SW C3108 21 LAN_SW 8111G/LAN_SW 21 21 21 RTL8111 LDO mode. C3122 SCD1U16V2KX-3GP C3123 SCD1U16V2KX-3GP C3118 C3119 SCD1U16V2KX-3GPSCD1U16V2KX-3GPL3101 LaCaCbCcCd RTL8111GUS-CG RTL8111G-CGT RTL8106EUS-CG RTL81 21 71.08111.W03 71.08111.U03 71.08106.003 071.0 8111G C3112 SCD1U16V2KX-3GP12 C3115 SCD1U16V2KX-3GP IN D - 4D 7U H - 242- G P SCD1U16V2KX-3GP SCD1U16V2KX-3GPChLAN_SW Ci Cj SCD1U16V2KX-3GP SC4D7U6D3V3KX-GP 68.4R71E.10G SWR mode LDO mode SWR mode LDO m 10/100/1000M 10/100/1000M 10/100M 10/10 Layout: For RTL8111G(S) * Place Ce and Cf close to each VDD33 pin-- 11, 32 For RTL8106E * Place Cg and Cf close to each VDD33 pin-- 23, 32 3D3V_LAN_S5 VDDREG 40 mils 1 R3104 2 0R0603-PAD 32 LAN _MD I0P 32 LAN _MD I0N 8111G/LAN_SW C3113 C3117 21 C3103 LAN_SW LAN_SW Cf: close to Pin32 Cl 32 LAN _MD I1P Ce 21 Cf 8106E Ce: close to Pin11 C3124 SCD1U16V2KX-3GPCk 32 LAN _MD I1N 21 Cg Cg: close to Pin23 21 C3110 32 LAN _MD I2P 21 SC4D7U6D3V3KX-GP 32 LAN _MD I2N X5R C 3D3V_LAN_S5 3D3V_LAN_S5 BQ402_1 4 1DYRN3102 C3109SC4D7U6D3V3KX-GPC3111 32 SRN10KJ-5-GP 21 DY DY SC4D7U6D3V3KX-GP 84.T3904.H11 21 Elet Q3104 LMBT3904LT1G-GP Layout: C3004: close to Pin32 17,24,40,55,61,68,76,91 PLT_RST# E DY C PLT_RST#_LAN C3005: close to Pin11 1 R3110 2 0R0603-PAD 3D3V_LAN_S5 rise time must be controlled between 0.5 mS and 100 mS. 3D3V_S5 Q3101 3D3V_LAN_S5 DMP2130L-7-GP 85mA S D SCD1U16V2KX-3GP B 21 21 D C3121 R3106 G 21 SCD1U16V2KX-3GP LAN_ENABLE_R_C 2 110KR2J-3-GP C3105 C3120 R3111 SC1U10V2KX-1GP 21 DY G 1 2 PM_LAN_ENABLE_C 20KR2J-L2-GP 84.02130.031 2nd = 84.00102.031 Q3102 3rd = 84.03413.B31 G 24 PM_LAN_ENABLE S D R3107 100KR2J-1-GP 2N7002K-2-GP BOM Option 1.0V Source RTL8111G-CGT 8111G LDO (71.08111.U03) A RTL8111GUS-CG SWR (71.08111.W03)/ LAN_SW RTL8106EUS-CG (71.08106.003) RTL8106E-CG 8106E LDO (071.08106.0003) 543

2 1 HIP (10/100/1000M & 10/100M co-lay) 106E-CG R3102 PC IE_R X_C O N _P6 C3102 2 SCD1U16V2KX-3GP PC IE_R X_C PU _P6 16 D 08106.0003 2K49R2F-GP PC IE_R X_C O N _N 6 2 SCD1U16V2KX-3GP PC IE_R X_C PU _N 6 16 C mode 12 1 B 00M 1 C3107 PCIE_TX_CON_P6 16 PCIE_TX_CON_N6 16 PEG_CLK2_CPU 18 PEG_CLK2_CPU# 18 3D3V_LAN_S5 LED0 1 TP3103 TPAD14-OP-GP RSET LED1 1 TP3102 TPAD14-OP-GP VDD10 LED2 1 TP3101 TPAD14-OP-GP LANXOUT LANXIN LOM31 32 31 30 29 28 27 26 25 33 GND AVDD33 RSET 1 2 C3104 AVDD10 SC1U10V2KX-1GP 1 MDIP0 CKXTAL2 (NC) REGOUT 24 REGOUT 2 CKXTAL1 23 2 SCD1U16V2KX-3GP 3 22 VDDREG C3114 1 4 LED0 21 5 (GPO)LED1/GPO 20 6 19 7 (LED1) LED2 18 8 17 VDD10 MDIN0 (DVDD33) VDDREG VDD10 3D3V_S0 VDD10 AVDD10 (NC)71.08111.U03 (NC) DVDD10 PCIE_W AKE# PCIE_W AKE# 24 MDIP1 LANWAKE# ISOLATE# 2 1 MDIN1 ISOLATE# MDIP2(NC) (071.08106.0003) PERST# PLT_RST#_LAN 21 R3109 MDIN2 (NC) HSON PC IE_R X_C O N _N 6 1KR2J-1-GP AVDD10 HSOP PC IE_R X_C O N _P6 R3113 MDIP3 (NC) 15KR2J-1-GP MDIN3(NC) AVDD33(NC) RTL8107E-CG PN:071.08106.0003 CLKREQ# HSIP HSIN REFCLK_P REFCLK_N RTL8111G-CGT-1-GP-U2 9 Manual: :071.08106.0003 10 11 12 13 14 15 16 RTL8111G-CGT (71.08111.U03/LDO Mode): 10/100/1000M < 252 mW. RTL8106E-CG (071.8107E.0A03): 10/100M <70mW. 32 LAN _MD I3P 3D3V_S5 32 LAN _MD I3N 3D3V_LAN_S5 PCIE_W AKE# R3103 2 LAN_CLKREQ_LAN# 1 PC IE_T X_C O N _P6 PC IE_T X_C O N _N 6 10KR2J-3-GP PEG_CLK2_CPU PEG_CLK2_CPU# tro-X 3D3V_LAN_S5 14 3D3V_LAN_S5 23 LANXOUT C3116 2 R3112 21DY LAN XIN 1 10KR2J-3-GP 21 SC15P50V2JN-2-GP R3108 CLK_LAN_REQ#_EN DY 10KR2J-3-GP X3101 XTAL-25MHZ-181-GP B 82.30020.G71 84.T3904.H11 LMBT3904LT1G-GP Q3103 18 CLKREQ_PCIE#2 CE LAN_CLKREQ_LAN# DY C3125 2 12 1 R3105 0R0402-PAD SC15P50V2JN-2-GP Ra Ch Cc Cd Ce La Ci Cj Ck Cl Cg O O O OO X X X X X X O O O O O X A X XO OO <Core Design> XX X X X X X X X X O Wistron Corporation 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title LAN RTL8106 Rev Size Document Number A00 A2 Vegas SKL/KBL-U 105 D ate: Monday, June 27, 2016 Sheet 31 of 1

5 4 3 Main Func = LAN LAN TransFormer (10/100/1000M & 10/10 D XF3201 XFORM-12P-48-GP 31 LAN_MDI3N 12 1CT:1CT 1 MDO3- 31 LAN_MDI3P 3 MCT0 MDO3+ 31 LAN_MDI2N 11 1CT:11CT0/100/1000 2 MDO2- 31 LAN_MDI2P 10 MDO2+ 5 8 4 MCT1 6 7 9 68.68167.30D C XF3202 9 31 LAN_MDI1N 7 6 MDO1- 4 MCT2 MDO1+ 31 LAN_MDI1P 8 1CT:1CT 5 MDO0- 10 1CT:1CT MDO0+ LOM_TCT 31 LAN_MDI0N 11 2 3 MCT3 31 LAN_MDI0P 12 1 21 C3201 XFORM-12P-48-GP Elet SCD01U50V2KX-1GP 68.68167.30D Layout note: Layout note: 30 mil spacing be 30 mil spacing between MDI differential pairs. Follow Reference Schematic 0.01uF~0.4uF B A 543

21 00M co-lay) ED3202 D C MCT3 LAN_MDI0P 1 IN1 NC#10 10 LAN_MDI0P MCT2 LAN_MDI0N 2 9 LAN_MDI0N MCT1 LAN_MDI1P 3 IN2 NC#9 8 LAN_MDI1P MCT0 LAN_MDI1N 4 7 LAN_MDI1N 5 GND GND 6 RN3201 LAN_MDI2P LAN_MDI2P SRN75J-1-GP LAN_MDI2N IN3 DY NC#7 LAN_MDI2N LAN_MDI3P IN4 NC#6 LAN_MDI3P C3202 LAN_MDI3N LAN_MDI3N SC100P3KV8JN-2-GPMCT 5 4 TVW DF1004AD0-1-GP 63 78.1013N.1AL72 75.01004.073 81 ED3201 1 IN1 NC#10 10 2 9 3 IN2 NC#9 8 4 7 5 GND GND 6 IN3 DY NC#7 IN4 NC#6 TVW DF1004AD0-1-GP 75.01004.073 21 tro-X 9 RJ45 1 etween MDI differential pairs. MDO0+ CHASSIS#9 2 MDO0+ MDO0- 3 MDO1+ 4 MDO0- MDO2+ 5 MDO1+ MDO2- 6 MDO2+ MDO1- 7 MDO2- MDO3+ 8 MDO1- MDO3- 10 MDO3+ MDO3- CHASSIS#10 B RJ45 RJ45-8P-186-GP 022.10001.0D41 Layout: Place near RJ45 AFTE14P-GP AFTP3204 1 MDO0+ AFTE14P-GP AFTP3201 1 MDO0- AFTE14P-GP AFTP3202 1 MDO1+ AFTE14P-GP AFTP3205 1 MDO2+ AFTE14P-GP AFTP3203 1 MDO2- AFTE14P-GP AFTP3208 1 MDO1- AFTE14P-GP AFTP3207 1 MDO3+ AFTE14P-GP AFTP3206 1 MDO3- <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title XFOM&RJ45 Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 32 of 105 21

54 3 Main Func = Card Reader R3301 2 1 D 0R0402-PAD 16 USB_CPU_PN5 16 USB_CPU_PP5 12 C R3302 0R0402-PAD Lay Clo Elet B A 543

3 2 1 D yout Note: USB_PN5_C 66 ose to CON1 USB_PP5_C 66 C tro-X3 B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Card Reader-RTS5170 Rev A4 Document Number A00 Vegas SKL/KBL-U 105 Date: Monday, June 27, 2016 Sheet 33 of 2 1

5 Elet43 D (Blankin C 43 B A 5

3 21 D ng) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size (Reserved) Rev A4 Document Number A00 Vegas SKL/KBL-U 105 Date: Thursday, June 16, 2016 Sheet 34 of 2 1

54 3 Main Func = USB3.0 Port1 D USB30_VCCC 5V_S5 U3501 5 IN OUT 1 2 GND 3 OC# C3510 21 24 USB_PW R_EN# 4 EN# USB_OC0# 16 SC1U10V2KX-1GP 21 SCD1U16V2KX-3GP Active Low Elet SY6288DAAC-GP 074.06288.009B C Main Func = USB2.0 Port3 B 5V_S5 Support 2A USB20_VCCA 24 USB_PW R_EN# U3503 C3504 5 IN OUT 1 2 4 EN# GND 3 USB_OC2# 16 OC# Active Low SY6288DAAC-GP 074.06288.009B A 543

2 1 D USB3.0 Port1 2A Layout Note: Close USB1 C USB30_VCCC TC3501 C3508 DY SC100U6D3V6MX-GP C3518 78.10710.52L 21 C3512 C3513 C3517 SCD1U16V2KX-3GPSCD1U16V2KX-3GP C3507 21 SC1U10V2KX-1GP SC22U6D3V5MX-2GP 21 SC22U6D3V5MX-2GP 21 21 tro-X USB2.0 Port3 (IO Board) B USB20_VCCA 2A Layout Note: Close CON1 21 C3515 DY 21 SC1U10V2KX-1GP SC22U6D3V5MX-2GP 21 <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number USB switch Rev Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 35 of 105 21

5 43 Main Func = USB3.0 Port1 Stuff for ESD R2 spec ED3602 USB3_PRX_CTX_N1_C 1 LINE_1 NC#10 10 USB USB3_PRX_CTX_P1_C 2 LINE_2 NC#9 9 USB 3 GND GND 8 USB3_PTX_CRX_N1_C 4 LINE_3 NC#7 7 USB USB3_PTX_CRX_P1_C 5 LINE_4 NC#6 6 USB D EL3601 2 USB_PN0_C AZ1045-04F-R7G-GP 16 USB_CPU_PN0 1 USB_PP0_C 16 USB_CPU_PP0 75.01045.073 43 FILTER-4P-137-GP-U 68.01012.20B 16 USB30_TX_CPU_P1 C3602 R3605 USB3_PTX_CRX_P1_C 16 USB30_RX_CPU_ 1 2 USB3_PTX_CRX_P1_R 0R0402-PAD SCD1U16V2KX-3GP 21 C 16 USB30_TX_CPU_N1 C3601 21 USB3_PTX_CRX_N1_C 1 2 USB3_PTX_CRX_N1_R SCD1U16V2KX-3GP 0R0402-PAD 16 USB30_RX_CPU_ R3606 Main Func = USB3.0 Port2 Elet Stuff for ESD ED3603 EL3602 USB3_PRX_CTX_N2_C 1 LINE_1 NC#1 43 USB3_PRX_CTX_P2_C 2 LINE_2 NC# USB3_PTX_CRX_N2_C 3 GND GN 12 USB3_PTX_CRX_P2_C 4 LINE_3 NC# 5 LINE_4 NC# FILTER-4P-137-GP-U USB_PN1_C B 16 USB_CPU_PN1 USB_PN1_C USB_PN0_C AZ1045-04F-R7G 16 USB_CPU_PP1 68.01012.20B USB_PP1_C 75.01045.07 R3609 0R0402-PAD 2nd = 75.00 21 Stuff for ESD ED3604 1 I/O1 I/O4 2 GND VDD 3 I/O2 I/O3 AZC099-04S-2-G 075.09904.0 16 USB30_TX_CPU_P2 C3605 USB3_PTX_CRX_P2_C 16 USB30_RX_CPU_P2 1 2 USB3_PTX_CRX_P2_R SCD1U16V2KX-3GP A 16 USB30_TX_CPU_N2 C3604 21 USB3_PTX_CRX_N2_C 16 USB30_RX_CPU_N2 5 1 2 USB3_PTX_CRX_N2_R 3 SCD1U16V2KX-3GP 0R0402-PAD R3610 4

2 1 USB3.0 Port1 B3_PRX_CTX_N1_C USB30_VCCC USB1 B3_PRX_CTX_P1_C USB_PN0_C 1 VBUS CHASSIS#10 10 B3_PTX_CRX_N1_C USB_PP0_C CHASSIS#11 11 B3_PTX_CRX_P1_C 2 D- CHASSIS#12 12 USB3_PRX_CTX_N1_C 3 D+ CHASSIS#13 13 USB3_PRX_CTX_P1_C USB3_PTX_CRX_N1_C 4 D USB3_PTX_CRX_P1_C 7 5 SSRX- 6 SSRX+ PGND 1 AFTP3604 GND 8 SSTX- 9 SSTX+ USB3.0 SKT-USB13-179-GP 022.10005.0831 _P1 R3607 USB3_PRX_CTX_P1_C 0R0402-PAD 21 C USB30_VCCC 1 AFTP3601 USB_PN0_C 1 AFTP3602 USB_PP0_C 1 AFTP3603 _N1 21 USB3_PRX_CTX_N1_C tro-X 0R0402-PAD R3608 21 D R2 spec USB3.0 Port2 #10 10 USB3_PRX_CTX_N2_C USB2 C#9 9 USB3_PRX_CTX_P2_C 8 USB30_VCCC 1 VBUS CHASSIS#10 10 ND 7 USB3_PTX_CRX_N2_C USB_PN1_C CHASSIS#11 11 C#7 6 USB3_PTX_CRX_P2_C USB_PP1_C CHASSIS#12 12 C#6 CHASSIS#13 13 USB3_PRX_CTX_N2_C 2 USB3_PRX_CTX_P2_C 3 D- 4 B D+ 7 G-GP USB3_PTX_CRX_N2_C USB3_PTX_CRX_P2_C 5 SSRX- 73 6 SSRX+ 0107.073 1 AFTP3608 D R2 spec 8 SSTX- PGND USB30_VCCC 9 SSTX+ GND USB_PN1_C USB_PP1_C USB3.0 USB30_VCCC SKT-USB13-179-GP 46 USB_PP1_C D5 34 022.10005.0831 GP USB_PP0_C DY C3618 SCD1U16V2KX-3GP 0A7C 1 AFTP3605 1 AFTP3606 R3611 1 AFTP3607 0R0402-PAD USB3_PRX_CTX_P2_C 21 <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. 21 USB3_PRX_CTX_N2_C Title USB30 Rev 2 Document Number 0R0402-PAD Size A00 R3612 A3 Vegas SKL/KBL-U 105 Date: Monday, June 27, 2016 Sheet 36 of 1

54 3 Main Func = USB2.0 Port3 D USB port 3 (USB2.0 onl 16 USB_CPU_PN2 EL3406 2 US 16 USB_CPU_PP2 1 US C 43 L FILTER-4P-137-GP-U C 68.01012.20B USB ESD Diode Elet Stuff for ESD R2 spec ED3404 B USB_PP2_C 1 I/O1 I/O4 6 USB_PN2_C 2 GND DYVDD 5 3 I/O2 4 I/O3 AZC099-04S-2-GP SCD1U16V 075.09904.0A7C Layout Note: Close to CON1 A 543

32 1 D ly) CMC USB_PN2_C 66 USB_PP2_C 66 C SB_PN2_C SB_PP2_C Layout Note: Close to CON1 tro-X 21 USB20_VCCA B C3406 <Core Design> DY Wistron Corporation A V2KX-3GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 3 Taipei Hsien 221, Taiwan, R.O.C. Title Size USB20 Rev A4 Document Number A00 Vegas SKL/KBL-U 105 Date: Monday, June 27, 2016 Sheet 37 of 2 1

5 Elet43 D (Blankin C 43 B A 5

3 21 D ng) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size (Reserved) Rev A4 Document Number A00 Vegas SKL/KBL-U 105 Date: Thursday, June 16, 2016 Sheet 38 of 2 1

5 Elet43 D (Blankin C 43 B A 5

3 21 D ng) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size (Reserved) Rev A4 Document Number A00 Vegas SKL/KBL-U 105 Date: Thursday, June 16, 2016 Sheet 39 of 2 1

5 4 3 Main Func = Power Plane & Sequence ROSA Run Power 3D3V_AUX_S5 1 DY 2 PS_S3CNTRL R4004 5V_S5 5V_S0 D 100KR2J-1-GP U4001 5V_S0 5V_S0 Comsumption DG S Peak current 5A 1 13 Q4001 2 14 3D3V_S0 16 VIN1#1 VOUT1#13 25 VIN1#2 VOUT1#14 3D3V_S0 3D3V_S0 Comsumption 34 Peak current 2.5A 2N7002KDW -GP DY 3D3V_S5 6 VIN2#6 VOUT2#8 8 84.2N702.A3F 7 VIN2#7 VOUT2#9 9 SC10U6D3V3MX-GP C4005 SC10U6D3V3MX-GP C4004 SC470P50V2KX-3GP C4001 SC470P50V2KX-3GP C4002 2nd = 84.2N702.E3F S G D SS1 12 3V5V_CT1 21 3rd = 75.00601.07C SS2 10 3V5V_CT2 21 5V_S5 4 VBIAS 17,24,27,51 SIO_SLP_S3# 1 R4010 2 3V5V_S0_ON 3 EN1 GND 11 17,24,26 RESET_OUT# 5 EN2 GND 15 21 0R0402-PAD 21 AP22966DC8-7-GP 074.22966.0093 H_THERMTRIP# 4 17 H_THERMTRIP_EN H _T H ER MT R IP_EN Q4002CE MMBT2222A-3-GP 84.02222.V11 B DY 17,24,31,55,61,68,76,91 PLT_RST# R4007 2 21 C4003 SCD1U16V2KX-3GP 1 DY DY 4K7R2J-2-GP 21 DY R4003 2K2R2J-2-GP C 45 3V_5V_EN D4001 3 PURE_HW _SHUTDOW N# 26,79 2 1 21 R4006 C4009 21 LBAS16LT1G-GP 83.00016.P11 SC4D7U6D3V3KX-GP R4020 1 DY 2 20KR2J-L2-GP 0R2J-2-GP R4009 2 ALW ON 24 1 10KR2J-3-GP EOPIO and EDRAM 5V_S5 1D0V_S5 +V_EDR+V_EDRAM_VR U4004 Elet 1 VIN#1 VOUT#8 8 V_ED R AM_EO PIO _R 1 23e 2 R4021 Voltage = 1.0 2 VIN#2 VOUT#7 7 1D0V_S5 0R6J-3-GP Imax = 3.2 A 17,24,27,51 SIO_SLP_S3# R4018 1 DY 2 EN_EDRAM_VR 3 VBIAS VOUT#6 6 TRISE = 240 us 4 ON 5 Imax = 6 A 0R2J-2-GP GND Rds on = 4.65mohm 1D0V_S5 23e VIN#9 9 17,24 ALL_SYS_PW RGD R4019 1 23e 2 0R2J-2-GP V_ED R AM_EO PIO _R [#543977 Rev1.1] PDDG change to ALL_SYS_PWRGD 21 T PS22961D N YT - G P 074.22961.0093 C4015 23e 21 SC10U10V5KX-2GP 21 SC1U10V2KX-1GP C4011 C4010 23e DY 1D0V_S5 SCD1U16V2KX-3GP B Q4003 G DMN5L06K-7-GP V_ED 84.05067.031 6 ZVM# SD EN_EDRAM_VR DY D4003 K DY A RB751V-40H-GP 83.R2004.G8F MANAGEMENT RAIL POWER GENERATION VCCST, VCCSTG, and VCCPLL can remain powered during S4 and S5 power 3D3V_S5 5V_S5 VIL > 0.7 V, VIH < 2 V Rds(on) = 11 mΩ @ VDD = 4 V Ids(max) 10 A SCD1U16V2KX-3GP C4014 21 3D3V_S5 C4028 DY 21 DY SCD1U16V2KX-3GP SC1U10V2KX-1GP +V1.00U _C PU _LS 21 21 U4006 1R 0R0 U4005 21R4026 1 VIN VOUT#8 8 1D0 21 2 VIN VOUT#7 7 A 1 NC#1 VCC 5 DY 10KR2J-3-GP VCCSTU_EN 1 R4024 2 VCCSTU_EN_R 3 VBIAS VOUT#6 6 17,24,44,51 SIO_SLP_S4# 4 4 EN 5 GND 2A 0R0402-PAD 9 VIN DY 3 GND VCCSTU_EN SC10U6D3V3MX-GP Y APE8939GN3-GP C4013 DY EC4001 C4018 SCD1U16V2KX-3GP 74LVC1G07GW -GP DY 074.08939.0093 73.01G07.0HG 1 R4023 2 U4002 U4006 change to 074.08939.0093 for quality issue change 2/26 0R0402-PAD 543

2 1 3D3V_S0 Power Good 21 R4005 1KR2J-1-GP 51 PW R_VDDQ_PG 1 R4011 2 ALL_SYS_PW RGD 17,24 0R0402-PAD 1 R4002 2 VR_EN 46 D4002 0R0402-PAD 3 RSMRST_PW RGD# 1 DY 2 LBAS16LT1G-GP D 83.00016.P11 3D3V_S5 3D3V_S5_KBC [#543016] Optional, Added for addition system robustness 21 21 53 1D0V_S5_PW RGD 1 R4029 2 0R0402-PAD R4031 DY R4032 54 1D8V_S5_PW ROK 100KR2J-1-GP 17,45,53,54 3V_5V_POK 100KR2J-1-GP 1 R4030 2 0R0402-PAD RSMRST_PW RGD# NON DS3: R4033 1 DY 2 0R2J-2-GP PH 3V_5V_POK to 3D3V_AUX_S5 at page17 VCCSTG and VCCIO 5V_S5 21 +VC C IO +VCCSTG 21 C4029 DY +VCCIO(ICCMAX = 2.73A) +VCCSTG(ICCMAX.=0.16A) Trise=10US < TR < 65US SC1U10V2KX-1GP U4002 C B 1 VIN VOUT#8 8 1 R4048 2 2 VIN VOUT#7 7 3 VBIAS VOUT#6 6 0R0805-PAD 4 EN 5 17,24,27,51 SIO_SLP_S3# 1 R4034 2 VCCSTG_EN_R GND 9 0R0402-PAD VIN 1D0V_S5 C4017 SC10U6D3V3MX-GP APE8939GN3-GP 21 C4007 SCD1U16V2KX-3GP DY 21 SC10U6D3V3MX-GP VIL > 0.7 V, VIH < 2 V 074.08939.0093 C4016 Rds(on) = 11 mΩ @ VDD = 4 V Ids(max) 10 A tro-X U4002 U4006 change to 074.08939.0093 VCCSTG should only ramp up equal to or after VCCST. for quality issue change 2/26 21 RAM_VR V ± 50 mV s +V_EOPIO_VR V1.8S 1D8V_S5 Q4006 +V1.8S_ED R AM DMP2130L-7-GP Voltage = 1.0 V ± 50 mV 17,24,27,51 SIO_SLP_S3# Imax = 2.8 A 100mA TRISE = 240 us S D +V_EOPIO_VR 23e D D R AM_EO PIO _R 21 G SCD1U16V2KX-3GP 1D8S_EN# 2 1 21 G 23e C4026 R4044 23e C4022 84.02130.031 21 C4027 SC1U10V2KX-1GP 2nd = 84.00102.031 23e10KR 2J - 3- G P 3rd = 84.03413.B31 23e R4022 2 23e 1 SCD1U16V2KX-3GP 0R6J-3-GP R4041 2 1D8S_EN_R# 1 23e Q4007 20KR2J-L2-GP G 23e D S 2N7002K-2-GP states for board VR optimization. VCCST +V1.00U _C PU R4025 2 0805-PAD SC10U6D3V3MX-GP A C4012 0V_S5 <Core Design> +VCCSTG +VCCST_CPU Wistron Corporation +V1.00U _C PU 0.04 A 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, R4045 2 Taipei Hsien 221, Taiwan, R.O.C. 1 DY Title Power Plane Enable 0R2J-2-GP Size 1 R4036 2 A2 Document Number Rev D ate: 0R0402-PAD Vegas SKL/KBL-U A00 Monday, June 27, 2016 Sheet 40 of 105 2 1

54 3 Main Func = Power & Sequence D 3D3V_S5 R4101 3D3V_S5_PC 1 2 0R0805-PAD C Elet B A 543

3 21 CH D 3 C tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Connected_Standby(1/2)+DS3 Size Document Number SKL/KBL-U Rev A4 Vegas A00 Date: Thursday, June 16, 2016 Sheet 41 of 105 2 1

5 Elet43 D (Blanking) C 43 B A 5

3 21 D ) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Connected_Standby(2/2) Size Document Number Rev A4 Vegas SKL/KBL-U A00 Date: Thursday, June 16, 2016 Sheet 42 of 1 105 2

5 4 3 Main Func = ADT Input 33R2J-2-GP 1 DY 2 Layout Note: PR4306 D PSID Layout width > 25mil DMN5L06K-7-GP PQ4301 PS_ID _R 12 PS_ID _R 2 DS PS_ID _R 1 PR4305 PR4317 12 0R0603-PAD 84.05067.031 33R2J-2-GP 1 2 12 1 5V_S5 3 E CG PD4303 DY 100KR2J-1-GP PR4303 1 PESD24VS2UT-GP 2 PR4309 PSID_DISABLE#_R_C 2 10KR2J-3-GP PQ3802_1 B LMBT3904LT1G-GP 15KR2F-GP PQ4302 84.T3904.H11 PR4302 JGND 1 EL4304 2 0R0805-PAD-2-GP-U D C IN 1 1 EL4303 2 60ohm@100MHz 0R0805-PAD-2-GP-U DCR=0.02 ohm 8 Max current = 6000mA 6 1 AFTP4301 5 1 AFTP4315 4 3 DY EC4301 DY 2 21 21 AK PC4302 21 SCD1U50V3KX-GP 1 PR4314 21 PC4301 7 EC4302 3K3R6J-GP SCD1U25V2KX-GP PD4301 Elet SC1U50V3KX-GP C SD103AW S-2-GP ACES-CON6-63-GP SC10U25V5KX-GP 21 20.F2132.006 JGND JGND PR4312 PQ3809_D 84.2N702.A3F PQ4304 R1 2nd = 84.2N702.E3F R2 DY 100KR2J-1-GP PQ4306 3rd = 75.00601.07C C AD_OFF_L 2 3 1 AC _IN #_G 4 B R1 3 AD_OFF_R PR4313 E 0R0402-PAD PQ4305 R2 LTA024EUB-FS8-GP JGND LMUN5212T1G-GP 84.00024.01K PS_ID _R 25 +D C _IN D C IN 2 16 84.05212.B11 4 NOVA 7 21 2N7002KDW -GP 1 2 3 4 5 6 8 TP4301 1 AC _IN _KBC # TPAD14-OP-GP 20.F2132.006 24,44 AC _D IS ACES-CON6-63-GP 1/22 AFTP4313 for NOVA add AFTP4312 AFTP4314 1 +D C _IN 1 PS_ID _R 1 +D C _IN Main Func = M-BAT Input B BT+ 21 BT+ BATT2 21 1 EC4308 AK PD4304 Batt Connecter DY EC4307 DY SMF18A-GP 2 DY SCD1U25V2KX-GP 3 SC10P50V2JN-4GP PBAT_SMBCLK1 SC10P50V2JN-4GP BATT1 PBAT_SMBDAT1 4 NOVA SC10P50V2JN-4GP PBAT_PRES1# 9 SYS_PR ES1# 5 SCD1U50V3KX-GP 1 6 7 RN4302 5 2 8 6 3 4 7 4 ACES-CON8-S1-GP 3 8 5 24,44 SMBCLK1 2 PBAT_SMBCLK1 6 24,44 SMBDA1 1 7 24,44 PBAT_PRES# PBAT_SMBDAT1 8 10 PBAT_PRES1# 1 R4301 2 SYS_PR ES1# SRN100J-4-GP 0R0402-PAD for NOVA add 1/25 EC4309 21 EC4306 Layout note: mil ALP-CON8-17-GP-U1 PBAT_PRES1# 1 AFTP4303 21 SYS_PRES1# >40 PBAT_SMBDAT1 1 AFTP4308 DY 20.81775.008 PBAT_SMBCLK1 1 AFTP4304 12 1 AFTP4307 EC4310 1 AFTP4311 BT+ 1 AFTP4306 1 AFTP4309 BT+ 1 AFTP4302 DY DY 1 AFTP4310 BT+ 1 AFTP4305 SYS_PR ES1# A 543

2 1 D 3D3V_S5 2 3D3V_S5 3 PR4304 1 2K2R2J-2-GP 21 PD4302 LBAV99LT1G-1-GP 75.00099.O7D 2nd = 75.00099.K7D 3rd = 75.00099.Q7D PS_ID 24 2tro-X 1 +D C _IN21 PR4307 PU4301 D8 AD+ 21 240KR3-GP D7 PC4305 PR4308 1S D6 DY 47KR3J-L-GP 2S D5 SCD01U50V2KX-1GP 3S 21 4G PC4303 AON7403-GP-U SCD01U50V2KX-1GPDY C 21 84.07403.037 PC4304 SCD01U50V2KX-1GP 21 PC4306 SC10U25V5KX-GP Id=-9.6A Qg=-25nC Rdson=18~30mohm 21 Placement: Close to Batt Connector SMBCLK1 B SMBDA1 3D3V_S5_KBC PBAT_PRES# 1 3 2 1 3 2 1 3 2 D4304 D4305 D4306 LBAV99LT1G-1-GP LBAV99LT1G-1-GP LBAV99LT1G-1-GP 75.00099.O7D 75.00099.O7D 75.00099.O7D 2nd = 75.00099.K7D 2nd = 75.00099.K7D 2nd = 75.00099.K7D 3rd = 75.00099.Q7D 3rd = 75.00099.Q7D 3rd = 75.00099.Q7D A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number DCIN Rev A2 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 43 of 105 21

5 43 Main Func = Charger AD+ +SD C _IN D PQ4410 S1 PR4426 S2 D01R3721F-GP-U 8D S3 7D G4 12 6D 5D 21 AON7403-GP-U PR4441 1PG_1 1 2 PG4429 100KR2J-4-GP GAP-CLOSE-PW R-3-GP 84.07403.037 PR4422 21 PR4420 AD+_G_2 10KR2F-L1-GP 10KR2F-L1-GP DC_IN_D 12 2 PR4467 0R0402-PAD-1-GP AD+_G_1 PC4466 SCD1U25V2K 12 AC O K_IN 2N7002KDW -GP PC4467 12 SC2K2P50V2KX-L-GP 34 21 PWR_CHG_ACN 25 DY PWR_CHG_ACP 16 DCBATOUT PQ4405 84.2N702.A3F PR4477 2nd = 84.2N702.E3F 1KR2F-3-GP 4th = 84.DMN66.03F 3rd = 75.00601.07C PW R_CHG_REGN AD+ PC4409 21 PR4454 SC1KP50V2KX-L-1-GP 100R5F-2-GP PR4417 12 100KR2J-1-GP PC4408 C 17,24 ACOK_IN PR4418 191KR2F-1-GP 3D3V_AUX_S5 2 12 1 VAC DET 21 PR4452 QPCN 28 PWR_OPCN 2 1 PC4407 BGATE 25 PWR_CHG_BATDRV 2 1 SC1KP50V2KX-L-1-GP 21 Greater than 2.633 V 150KR2F-L-GP SC1KP50V2KX-L-1-GP 21 Less than 3.5 V 21 AC_IN:3.35~3.75V PW R_CHG_ACDET CSIP 32 PWR_CHG_ACP CSIN 31 PWR_CHG_ACN ASGATE 30 PWR_CHG_ASGATE CMSRC 29 PWR_CHG_CMSRC VDD QPCP 27 PWR_OPCP VBAT 26 PWR_VBAT 21 PC4419 21 SCD01U50V2KX-L-GP DY DY DY DY 100KR2F-L2-GPDY PR4416 300KR2F-L-GP 18K7R2F-GP PR4435 PR4449 PR4450 PR4434 PR4451 100KR2F-L2-GP 21 21 PU4401 10KR2F-2-GP 10KR2F-2-GP PR4474 1 ACIN BOOT 24 PW R_ 0R0402-PAD PW R_ PR4470 AC O K_IN PW R_CHG_ACOK 2 ACOK UGATE 23 PW R_ 0R0402-PAD 12 PW R_CHG_SDA PW R_ 12 PW R_CHG_SCL PW R_ 24,43 SMBDA1 3 SDA Elet 22 VDD 24,43 SMBCLK1 12 PHASE PW R_ PW R_ 0R0402-PAD H_PROCHOT# 4 SCL ISL95521AH R Z - T - G P LGATE 21 PR4471 5 PROCHOT# VDDP 20 P 074.95521.0A73 24 AD _IA PR4475 1 2 0R0402-PAD PW R_CHG_AMON 6 AMON VDD 19 24 b oost_m on PR4476 1 2 0R0402-PAD PW R_CHG_BMON 24,46 P_SYS 7 BMON Use bom change to ISL88739DCIN 18 8 PSYS (P/N: 074.88739.0073) 17 NTC 21 PC4404 21 11 CCLIM 21 12 FSET 21 13 BATGONE PC4402 PC4403 PR4411 12 1 SC2K2P50V2KX-L-GP SC2K2P50V2KX-L-GP SC2K2P50V2KX-L-GP 1KR2F-3-GP DY DY 33 9 PROG 14 CSON 15 CSOP 16 ACLIM 10 COMP GND B VDD PWR_CHG_FSET PWR_CHG_BATGONE 21 PR4402 21 PR4401 PWR_CHG_PROG 2 200KR2F-L-GP 200KR2F-L-GP PWR_CHG_COMP PW R_CHG_SRP C C LIM PW R_CHG_SRN AC LIM 21 0R0402-PAD PR4406 3D3V_AUX_S5 21 21 PC4405 SCD022U16V2KX-3GP PR440482K5R2F-GP PR440395K3R2F-GP 21PC4406 PR4409 PR4407 100R2F-L1-GP-U DY DY 2 1 PR_2 2 1 DY 100KR2F-L2-G 12SC470P50V2KX-L-GP PR4405 147KR2F-GP 21 21 PR4439 PBAT_PRE Need fine tune 12 100KR2F-L1-GP Battery PROCHOT# Circuit 3D3V_S5 PC4436 SC10P50V2JN-L1-GP 2 1 21 2 1 Change net name fr by power team Edwa DY PR4472 100KR2F-L1-GP A 24,43 PBAT_PRES# PC4433 SCD47U25V3KX-1GP PR4415 PQ4402 G BP_G 1 2BP_D D S 4,24,46 H_PROCHOT# 0R0402-PAD 2N7002K-2-GP PR4478 100KR2J-1-GP 84.2N702.J31 2ND = 84.2N702.031 3rd = 84.07002.I31 5 4 3

2 1 DCBATOUT +VCHGR 1S PQ4401 8 2S D 7 3S D 6 4G D 5 D PG44071PG_2 1 2 AON7403-GP-U P GAP-CLOSE-PW R-3-GP 84.07403.037 AD+ D PR4440 AD+_R 20KR3J-1-GP 12 21 PR4445 470KR2J-L1-GP PR4468 PQ4412 PR4444 2R2F-GP G 1KR2J-L2-GP 21 2 AC _D IS_R AC _D IS 24,43 PC4471 KX-L-GP SCD22U10V2KX-L1-GP D 21 12 S Notice:ZZ.2N702.J3101 PC4468 2N7002K-2-GP SC2K2P50V2KX-L-GP 84.2N702.J31 DY DCBATOUT PC4418 PC4427 PC4438 PC4459 PC4456 SCD1U25V2KX-L-GP2121 symbol name change by Andy 1/19 SC10U25V5KX-L-GP 12 SC10U25V5KX-L-GP SC10U25V5KX-L-GP SC10U25V5KX-L-GP P 55 21 BT+ BT+ 36 36 27 27 18 18 PC4401 PC4410 C B 21DS 21 21 SC10U25V5KX-L-GP 21 21 SC10U25V5KX-L-GP 21DS DS D G PU4411 65 BOM 84.06520.037 AON6520-GP 4 +VCHGR BT+ PC4464 PL4401 PR4443 tro-X PW R_CHG_PHASE 12 12 PC4452 PC4453 C O IL- 4D 7U H - 33- G P D01R3721F-GP-U 21PR4428 PC4431 SC10U25V5KX-L-GP SC10U25V5KX-L-GP 12 SCD1U25V2KX-L-GP 21SCD22U25V3KX-GP 68.4R71A.20H PG4428 210R0603-PAD-1-GP-U 1 PWR_CHG_SRP_R 1 2 1 PWR_CHG_SRN_R 1 2 _CHG_BTST 1 2PW R_CHG_BTST1 1 2 DS PG4426 DS _C H G _H ID R V DS GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP D G _CHG_PHASE PU4412 65 BOM 84.06520.037 AON6520-GP _CHG_LODRV PR4481 _CHG_REGN 4 0R2J-2-GP _C H G _D C IN VDD PW R_CHG_REGN 2 DY 1 _CHG_NTC PR4438 BT+ 12 4D7R3F-L-GP PC4446 PC4445 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP DY PD4410 AD+ 3 PR4456 PR4457 1 R1 2R2F-GP 0R0402-PAD-1-GP PR4410 7K15R2F-L-GP PR4437 1 2 PQ4416 2 PC4463 2 DY 2R2F-GP R2 SCD1U25V2KX-L-GP PW R_CHG_NTC_1 2PW R_CHG_DCIN_R 3 LTA024EUB-FS8-GP PC4462 1 12 SC2K2P50V2KX-L-GP DY 84.00024.01K PC4435 DY PR4412 SC1U50V3KX-GP 2 12 NTC-220K-1-GP-U PQ4415 PC4461 BAT54C-7-F-3-GP LMUN5212T1G-GP SC2K2P50V2KX-L-GP 2nd = 83.R2003.W81 84.05212.B11 3rd = 75.00054.A7D C 17,24,40,51 SIO_SLP_S4# B R1 E R2 AD+ CPU PROCHOT# Circuit GP 21 PR4431 C E PQ4409_E 2 1 100KR2J-1-GP ES# PBAT_PRES# 24,43 PR4414 H_PROCHOT# 4,24,46 rom BAT_IN# to PBAT_PRES# 1MR2J-1-GP DY 12 ard 1/30 PD4404 L1SS355T1G-GP PQ4409 PR4458 84.2N702.A3F MMBT3906-7F-GP 0R0402-PAD 2nd = 84.DM601.03F K APD4404_A B 3rd = 84.2N702.E3F PD4404_K 84.03906.P11 PQ4406_3 PQ4406 4th = 84.2N702.F3F A PQ4406_2 3 12 PR4459 PQ4409_C 2 1 2 4 0R0402-PAD 5 PQ4406_5 PR4462 PR4413 21 100KR2F-L1-GP 0R0402-PAD SC1U10V2KX-1GP16 PC4439 21 21 PQ4406_6 <Core Design> PWR_CHG_ACOK 2N7002KDW -GP PR4455 DY PR4408 Wistron Corporation 680KR2F-GP 0R2J-2-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, DCBATOUT 12 Taipei Hsien 221, Taiwan, R.O.C. PR445321 Title Document Number Charger Rev 10KR2F-2-GP 3D3V_S5 Size Vegas SKL/KBL-U A00 A2 2 Monday, June 27, 2016 Sheet 44 of 105 D ate: 1

A B C Main Func = 3D3V_5V 3D3V_AUX_S5 PR4501 21 21 4 0R2J-2-GP DY PR4530 1 PW R_5V_EN1_R PR4502 PW R_5V_E 0R0402-PAD 2 DY PR4504 12 0R0402-PAD 0R2J-2-GP 40 3V_5V_EN PR4503 0R0402-PAD 1 2 PW R_3D3V_E DCBATOUT PW R_DCBATOUT_3D3V PG4525 Change PU4503 from 074.06575.0A t 21 74.51225.073 by power change 2/26 GAP-CLOSE-PW R DCBATOUT PG4521 21 GAP-CLOSE-PW R PG4524 21 GAP-CLOSE-PW R PG4531 21 GAP-CLOSE-PW R PW R_DCBATOUT_3D3V PC4528 PC4509 3 PC4525 PC4519 PC4531 2 12 1 2 1 SC4D7U25V5KX-GP2121 SC10U25V5KX-GP 2 1PWR_3D3V_SNUB 2 1 DY SCD01U50V2KX-1GP SCD1U50V3KX-GP SC10U25V5KX-GP Design Current=3.5A VIN 12 5.25A<OCP>6.3A 21 21 1 S D8 PU4504 PU4503 2 S D7 AON7410-GP 3 S D6 VBST2 4 G D5 84.07410.A37 DRVH2 65 BOM SW2 DRVL2 PC4535 PR4528 3D3V_S5 3D3V_PW R 2 1PW R_3D3V_VBST2_11 2 PW R_3D3V_VBST2 2 9 2 1D5R3-GP 2 2 PG4526 SCD1U50V3KX-GP VBST1 17 PW R_5V_VBST1 1 DRVH1 16 PW R_5V_DRVH1 3D3V_PW R 18 PW R_5V_LL1 PL4502 PW R_3D3V_DRVH2 10 SW1 15 PW R_5V_DRVL1 DRVL1 GAP-CLOSE-PW R 12 PW R_3D3V_LL2 8 14 PW R_5V_VO1 PG4517 VO1 2 PW R_5V_FB1 PW R_3D3V_DRVL2 VFB1 1 IN D - 3D 3U H - 57- G P- U 11 GAP-CLOSE-PW R 68.3R310.20A PG4528 PR4533 DY PC4517 PT4502 PG4535 2D2R5F-2-GP 1S D8 Elet 1 21 3V_FEEDBACK 2 1 2S D7 SCD1U16V2KX-3GP 3S D6 GAP-CLOSE-PWR-3-GP 4G D5 PU4505 21 SE220U6D3VM-38-GP AON7410-GP GAP-CLOSE-PW R PW R_3D3V_FB2 4 VFB2 PG4522 DY 65 BOM 1 GAP-CLOSE-PW R PW R_3D3V_EN2 6 EN2 EN1 20 PW R_5V_EN1 PG4529 21 PW R_3D3V_CS2 5 CS2 CS1 1 PW R_5V_CS1 GAP-CLOSE-PW R 21 PR4517 100KR2F-L1-GP TPS51225RUKR-GP TPAD 79.22710.3KL DY 84.07410.A37 74.51225.07V3CLK 19 PW R_5V_VCLK 1 PC4520 SC330P50V3KX-GP 7 PGOOD GND 21 2 3 VREG3 13 VREG5 PR4512 21 PR4535 power feedback PR4517 change to 100K 6K65R2F-GP by Andy 1/27 3D3V_PW R_2 5V_PW R_2 DY0R 2J - 2- G P 3D3V_S5 PC4524 p PW R_3D3V_FB2_R PR4534 SC1U50V3KX-GP b PC4523 DY100KR2J-1-GP PC4526 21 DYSC 18P50V2J N - 1- G P 21 SC4D7U6D3V3KX-GP 21 PR4523 21 17,40,53,54 3V_5V_POK 10KR2F-2-GP PH at Page17 3D3V_PW R_2 3D3V_AUX_S5 Close to VFB Pin (pin5) 12 PR4505 0R0402-PAD I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L Inductor: CHIP IND 3.3UH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A O/P capCHIP CAP EL 220U 6.3V M6.3*4.4 /Chemi-con/ 18mOhm / 79.22710.3KL 1 H/S:SIS412 / 24mOhm/[email protected] / 84.00412.037 L/S:SIS412 / 24mOhm/[email protected] / 84.00412.037 ABC

DE EN1 DCBATOUT PW R_DCBATOUT_5V 4 EN2 3 PG4520 2 to 21 6 GAP-CLOSE-PW R PG4536 21 GAP-CLOSE-PW R PG4518 21 GAP-CLOSE-PW R PG4534 21 GAP-CLOSE-PW R PG4542 21 GAP-CLOSE-PW R PG4543 21 GAP-CLOSE-PW R PW R_DCBATOUT_5V PC4530 PC4529 PC4527 PU4501 DS5 45 21 SC4D7U25V5KX-GP2121 SC10U25V5KX-GP 5V_PW R 5V_S5 AON7410-GP DS36 36 SCD1U50V3KX-GP PG4527 DS 27 27 21 84.07410.A37 DG 18 18 65 BOM GAP-CLOSE-PW R Design Current=6.85A PG4519 PC4516 10.275A<OCP>12.33A 21 PR4524 2 PW R_5V_VBST1_1 1 2 5V_PW R GAP-CLOSE-PW R 1 PG4538 21 1D5R3-GP2 1 tro-X SCD1U50V3KX-GP PL4501 GAP-CLOSE-PW R DS 122 1PWR_5V_SNUB 2 1 PG4532 PC4518 PG4537 DS 21 DS IN D - 2D 2U H - 46- G P- U 1 DY D GAP-CLOSE-PW R 68.2R210.20B PG4533 G 21 PU4502 PR4529 21 GAP-CLOSE-PWR-3-GP 21 AON7506-GP SCD1U16V2KX-3GP GAP-CLOSE-PW R DY 2D2R5F-2-GP PG4523 65 BOM 21 21 PT4501SE220U6D3VM-38-GP 4 GAP-CLOSE-PW R 79.22710.3KL PG4541 84.07506.037 21 TP4501 GAP-CLOSE-PW R D14-OP-GP PG4540 21 PR4531 DY PC4536 105KR2F-1-GP SC560P50V-GP GAP-CLOSE-PW R PG4545 power feedback PR4531 change to 100K PR4525 2 12 1 PR4527 21 by Andy 1/27 2 12 1 15K4R2F-GP 0R2J-2-GP DY GAP-CLOSE-PW R PG4544 PW R_5V_FB1_R 21 PC4522 DY GAP-CLOSE-PW R SC18P50V2JN-1-GP PR4526 to VFB Pin (pin2) 9K76R2F-1-GP Close I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L =14Arms 68.2R210.20B Inductor: CHIP CHOKE 2.2U PCMC063T-2R2MN 18mohm/20mohm Isat 79.22710.3KL O/P capCHIP CAP EL 220U 6.3V M6.3*4.4 /Chemi-con/ 18mOhm / H/S:SIS412 / 24mOhm/[email protected] / 84.00412.037 1 L/S:SIS780 / 14.5mOhm/[email protected] / 84.00780.037 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title DCDC-3D3V&5V Size Document Number Rev A2 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 45 of 105 DE

5 4 3 Main Func = CPU_CORE D PR4602 PC4602 2 PR461 12 PW R_VCCSA_COMP_R 1 33K2R 7 VSSSA_SENSE 1 7 VCCSA_SENSE 1K5R2F-2-GP SCD015U25V2KX-GP PC463 SC2200P50V2KX-2GP PC4604 2 1 SC15P50V2JN-2-GP SC1KP50V 1 P PW R_VCCSA_VSN_R PC4603 PR461 SC1KP50V2KX-1GP P 1 2 0R0402-PAD 12 PC4605 SC1KP50V2KX-1GP 81208_AGND PR4603 1 2 0R0402-PAD PR4605 2 PR4604 1 12 825R2F-GP PR4608 2K8R2F-GP 12 PW R_VCCSA_VSP_R 12 12 PR4616 PC4608 0R0402-PAD SC1KP50V2KX-1GP PW R_VCCSA_VSP_RC 24,44 P_SYS PR4671 1 2 0R0402-PAD PSYS 1 20KR2F-L-GP PR4615 2 81208_AGND 7 VCCGT_SENSE PR4607 1 2 0R0402-PAD 21 PC4611 SC1KP50V2KX-1GP C PR4619 2 1 1KR2F-3-GP 7 VSSGT_SENSE PR4618 1 2 0R0402-PAD 22e 23e PW R_VCCGT_VSN_R 12 PC4612 SC2200P50V2KX-2GP PG4601 GAP-CLOSE-PW R-3-GP 21 212 1 21 PR4625 37D4R2F-GP 21 81208_AGND PWR_VCCGT_VSN PWR_VCCGT_VSP PW R_VCCGT_FB_R PR4626 PWR_VCCSA_VSP 1KR3F-GP PWR_VCCSA_VSN PWR_VCCSA_COMP PC4614 PR4632 81208_AGND PWR_VCCSA_ILIM SC470P50V2KX-3GP 12 PWR_VCCSA_CSP1B PWR_VCCSA_IOUT 2 12 1 26K1R2F-2-GP PWR_VCORE_VR_RDY PWR_VCORE_EN PR4631 GND 49 48 47 PC4617 4K75R2F-1-GP PU4601 46 SC10P50V2JN-4GP 45 44 43 42 41 40 39 38 37 VSN_2PHElet 12 VSP_2PH PSYS PWR_VCCGT_ILIM_R PC4615 VSP_1B VSN_1B SC470P50V2KX-3GP COMP_1B ILIM_1B PW R_VCCGT_COMP_R CSN_1B CSP_1B PR4634 PC4618 81208_AGND IOUT_1B VR_RDY 12 SC2200P50V2KX-2GP PW R_VCCGT_IOUT 1 EN NTC-220K-5-GP-U PW R_VCCGT_DIFFOUT 2 IOUT_2PH PWM 48 PW R_VCCGT_CSPA 22e 23e PR4638 1 PR4640 2 PW R_VCCGT_FB 3 DIFFOUT_2PH DR 165KR2F-GP 1 PR4639 2 PW R_VCCGT_COMP 4 FB_2PH S 48 PW R_VCCGT_CSPB 1 PR4637 2 21 75KR2F-GP 22e 23e PW R_VCCGT_ILIM 5 COMP_2PH ALE 48 PW R_VCCGT_CSNB 48K7R3F-1-GP PW R_VCCGT_CSCOMP 6 ILIM_2PH S 10R2F-L-GP 21 21 12K4R2F-GP PW R_VCCGT_CSSUM 7 CSCOMP_2PH PR4641 PC4620 PC4621 PW R_VCCGT_CSREF 8 CSSUM_2PH VR_H SC1KP50V2KX-1GP SC100P50V2JN-3GP 9 CSREF_2PH IOUT 10 CSP2_2PH CSP 1 23e 2 11 CSP1_2PH CSN 12 TSENSE_2PH ILIM B 47KR3F-GP VRMP VCC ROSC_COREGT COMP PR4643 2 23e 1 ROSC_SAUS VSN PWM1_2PH 5V_S5 PWR_VCORE_VRMP PWM2_2PH ICCMAX_2PH 48 PW R_VCCGT_CSNA PR4646 2 1 10R2F-L-GP 21 21 21 PR4642 ICCMAX_1A 1KR2F-3-GP ICCMAX_1B PC4623 PC4624 22 ADDR_VBOOT PW R_VCCGT_CSP2 PWM_1A SCD047U25V2KX-GP 23e TSENSE_1PH VSP_1A SCD047U25V2KX-GP 13 NCP 14 15 16 17 18 19 20 21 22 23 24 PC4626 21 PW R_VCCGT_CSP1 PWR_VCORE_VCC_R PW R_V SCD01U50V2KX-1GP PW R_VCCGT_TSENSE PWR_VCORE_ROSC_COREGT 48 PW R_VCCGT_CSPA PR4651 2 81208_AGND DCBATOUT PWR_VCORE_ROSC_SAUS PW R_V 48 PW R_VCCGT_CSPB 1 PW R_VCCGT_NTC PR4601 PW R_V 12 1KR2F-3-GP PW R_V PW R_V 4K87R2F-GP 2 21 1 23e PR4654 PC4629 4K87R2F-GP SCD01U50V2KX-1GP U22 15W U23e 28W 12 PR4655 81208_AGND 12 5V_S5 102K (64.10235.6DL) 100K (64.10035.6DL) Dummy 73K (64.73225.55L) 0R0402-PAD 12.4K (64.12425.6DL) 16.9K (64.16925.6DL) PR4613 PR4656 21 PR4657 1 PR4641 NTC-100K-1-GP-U 21 2D2R2F-GP 1 PR4640 69.60028.011 PR4661 PC4630 12 PR4664 P 12K4R2F-GP SCD1U25V2KX-GP 24KR2F-GP 2 PR4637 48.7K (64.48725.55L) 73.2K (64.73225.55L) 21 PR4643 Dummy 10R (64.10R05.6DL) 2 PR4654 Dummy 4.87K (64.48715.6DL) 2 PC4631 81208_AGND SC1U10V2KX-1GP 81208_AGND 81208_AGND 81208_A PC4624 Dummy D047U (78.47322.2FL) A PR4642 1K (64.10015.6DL) Dummy PR4662 48.7K (64.48725.6DL) 100K (64.10035.6DL) 543

21 11 R2F-GP 2 32 2 V2KX-1GP 81208_AGND D 21 PW R_VCCSA_CSN 50 21 PR4606 NTC-100K-1-GP-U 12 PC4607 PC4606 69.60028.011 SCD015U25V2KX-GP PW R_VCCSA_CSP 50 PR4609 2 0R0402-PAD 14K3R2F-GP 2 0R0402-PAD 1 2 PW R_VCCSA_CSN_NTC PR4612 3D3V_S0 12 8K06R3F-AS-GP 13 102KR2F-GP 2 22e 231e 21 PC4609 SC220P50V2KX-3GP DY PR4614 1 2 10KR2F-2-GP 81208_AGND PR4670 1 VR_RDY 1 AFTP4601 PR4630 1 VR_EN 40 +VCCST_CPU PR4623 100R2F-L1-GP-U PR4622 75R2F-2-GP PR4621 45D3R2F-L-GP 21 PC4610 +VCCST_CPU +VCCSTG Check +VCCST_CPU or +VCCSTG 21 SCD1U25V2KX-GP [#543016] 21 DY 21 21 21 VR_SVID_CLK 7 PR4624 PR4669 C B VR_SVID_ALERT# 7 23e 1KR2F-3-GP DY 75R2F-2-GP A PWR_VCCSA_PWMtro-X PWR_VCORE_DRVON PR4667 10R2F-L-GPPWR_VCORE_SDIO 2 1 47,48,50 VR_SVID_DATA 7 H_PROCHOT# 4,24,44 21 PR4666 0R0402-PAD PWR_VCORE_VRHOT# 50 PR4668 PR4665 49D9R2F-GP 12 100R2F-L1-GP-U PWR_VCORE_ALERT# 2 1 PC4613 1 2 SC470P50V2KX-3GP PR4628 1 2 PR4627 PW R_VCORE_CSP 47 12 PW R_VCORE_CSNNTC 110KR2F-GP 81208_AGND 8K06R3F-AS-GP 22e 23e PR4629 12 PWR_VCORE_SCLK 14KR2F-GP 12 PC463421 PC4616 PR4633 SCD022U16V2KX-3GP 21 SC6800P25V2KX-1GP NTC-100K-1-GP-U 21 69.60028.011 21 36 PW R_VCORE_CSN 47 35 M_1B 34 1 PR4635 2 RVON 33 32 PW R_VCORE_IOUT 59KR2F-GP 2 PC4601 12 81208_AGND SCLK 31 PW R_VCORE_CSP_1A PR4636 81208_AGND ERT# 30 22e 23e SC1500P50V2KX-2GP SDIO 29 PW R_VCORE_ILIM 1 2 PW R_VCORE_COMP_R 2K49R2F-GP HOT# 28 PW R_VCORE_COMP PC4633 T_1A 27 PW R_VCORE_VSN 1 P_1A 26 N_1A 25 SC1KP50V2KX-1GP M_1A P_1A PC4622 PC4619 1 2 N_1A 2 1PW R_VCORE_VSN_R SC15P50V2JN-2-GP SC1KP50V2KX-1GP PR4645 1 2 0R0402-PAD VSS_SENSE 7 2 0R0402-PAD 12 PC4625 PR4644 SC1KP50V2KX-1GP 422R2F-2-GP P81208MNTXG-4-GP PR4647 12 PR4648 1 VCC_SENSE 7 3K83R2F-GP VCORE_VSP 1 2PW R_VCORE_VSP_RC 1 2 PW R_VCORE_VSP_R PR4650 PR4649 2 VCORE_TSENSE PC4627 2K49R2F-GP SC1KP50V2KX-1GP VCORE_ADDR_BOOT VC C SA_IC C MAX 1 PW R_VCORE_NTC VC O R E_IC C MAX PW R_VCORE_PW M 47 PR4652 PW R_VCCGT_ICCMAX 5K49R2F-GP 0R0402-PAD 21 12 PC4628 PR4653 SCD1U25V2KX-GP NTC-100K-1-GP-U 69.60028.011 12 12 21 21 PR4662 PR4658 PR4660 PR4663 22e 23e 22e 23e 81208_AGND PR4659 10KR2F-2-GP 24KR2F-GP 15K8R2F-GP 90K9R2F-GP 48D7KR2F-GP 81208_AGND AGND PW R_VCCGT_PW MB 48 PW R_VCCGT_PW MA 48 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title NCP81208MN_CPU_VCORE(1/3) Size Document Number Rev A2 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 46 of 105 21

5 43 DCBATOUT Main Func = CPU_CORE PC4702 21 21 PC D SC10U25V5KX-GP SC10U25V5KX-GP 21 SC10U25V5KX-GP PC4703 PC4701 PR4701 PW R_ 12 PWR_VCORE_BOOT 3D9R3-GP 5V_S5 PR4702 PW R_VCORE_VCC THWN 1 25 GH 33 BOOT 35 2D2R2F-GP 26 27 21 28 29 PU4701 30 21 VIN 21 VIN PC4708 VIN SC1U10V2KX-1GP VIN VIN VIN C 6 VCC PHASED 34 PW R_VC 7 VCCD PHASEF 32 PC4707 SC2D2U10V3KX-1GP VSW #12 12 PW R_ VSW #13 13 5 CGND VSW #14 14 VSW #15 15 4 PW M 22e 23e VSW #16 16 2 PW R_VCORE_DISB# 2 DISB# VSW #17 17 46 PW R_VCORE_PW M PR4704 1 VSW #18 18 46,48,50 PW R_VCORE_DRVON 0R0402-PAD 36 ZCD_EN 5V_S5 3 SMOD# 2D2R5 GL#8 PGND Elet GL#9 PGND GL#10 PGND GL#11 PGND PGND PGND PGND PGND 8 19 NCP81382MNTXG-3-GP 9 20 10 21 11 22 23 24 31 37 PW R_VCORE_GL B PC SC2200P50V2KX A 543

21 PC4710 21 SC10U25V5KX-GP D 21 SC10U25V5KX-GP 21 SCD1U25V2KX-GP C4704 PC4705 _VCORE_BOOT_RC21 PC4706 12 PL4701 12 VCC_CORE21 C SCD22U25V3KX-GP 12 B PT4701 CORE_PHASED COIL-D15UH-2-GP SE330U2VDM-4-GP _VCORE_SW 68.R1510.20A 79.33719.20C PR4703 PG4707 DY5F-2-GP P tro-X 21 PG4708 GAP-CLOSE-PWR-3-GP Confirm with EE: GAP-CLOSE-PWR-3-GP 22uF/0805 total 32pcs (DY 5 pcs) PWR_VCORE_SNUB C4709 21 46 PW R_VCORE_CSP 46 PW R_VCORE_CSN DYX-2GP <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title NCP81382MN_CPU_VCORE(2/3) Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 47 of 105 21

5 4 3 Main Func = CPU_CORE DCBATOUT 21 21 21 PC4811 SC10U25V5KX-GP SC10U25V5KX-GP SC10U25V5KX-GP PC4804 21 21 SC10U25V5KX-GP SC10U25V5KX-GP 21 SCD1U25V2KX-GP PC4802 PC4803 PC4805 PC4806 D PR4802 PW R_VCCGT_BOOTA_RC 12 GH 33 BOOT 35 PWR_VCCGT_BOOTA 3D9R3-GP 5V_S5 PR4803 21 PC4809 2D2R2F-GP SCD22U25V3KX-GP 21 PW R_VCCGT_VCCA PU4801 THWN 1 25 26 27 28 29 30 21 VIN 21 VIN VIN VIN VIN VIN PC4808 6 VCC SC1U10V2KX-1GP 7 VCCD PHASED 34 PW R_VCCGT_PHASEDA PL4801 PHASEF 32 1 C O IL- D 15U H - PC4807 VSW#12 12 PW R_VCCGT_SW A SC2D2U10V3KX-1GP VSW#13 13 68.R151 5 CGND VSW#14 14 46 PW R_VCCGT_PW MA PR4808 1 2 PW R_VCCGT_DISB#_A 074.81382.0CE3 VSW#15 15 12 PG4808 46,47,50 PW R_VCORE_DRVON 4 PWM 22e 23e VSW#16 16 2 DISB# VSW#17 17 VSW#18 18 0R0402-PAD 36 ZCD_EN 21 GAP-CLOSE-PWR-3-GP 5V_S5 3 SMOD# PWR_VCCGT_SNUB_1 GL#8 PGND PR4804 GL#9 PGND GL#10 PGND DY2D2R5F-2-GP GL#11 PGND C PGND PGND PGND PGND 8 19 NCP81382MNTXG-3-GP 9 20 10 21 11 22 23 24 31 37 PW R_VCCGT_GL1 PC4810 DY21 SC2200P50V2KX-2GP 46 PW R_VCCGT_CSPA 46 PW R_VCCGT_CSNA DCBATOUT SCD1U25V2KX-GP PC4820 21 21 21 PC4827 21 21PC4812 Elet SC10U25V5KX-GP SC10U25V5KX-GP SC10U25V5KX-GP SC10U25V5KX-GP 23e 23e 23e 21 SC10U25V5KX-GP PC4829 PC4830 PC4828 23e 23e 23e B PR4805 PW R_VCCGT_BOOTB_RC 1 23e 2 BOOT 35 PWR_VCCGT_BOOTB 3D9R3-GP 5V_S5 PR4806 PC4845 21 2D2R2F-GP THWN 1 25 GH 33 23e SCD22U25V3KX-GP 26 2 23e PW R_VCCGT_VCCB PU4802 27 PW R_VCCGT_PHASEDB 28 PW R_VCCGT_SW B 23e 29 30 PR4807 1 DY2D2R5F-2-GP 21 VIN 21 VIN VIN VIN VIN VIN PC4847 6 VCC SC1U10V2KX-1GP 7 VCCD PC4846 23e 5 CGND PHASED 34 P SC2D2U10V3KX-1GP PHASEF 32 1 4 PWM C O IL- D 46 PW R_VCCGT_PW MB PR4809 PW R_VCCGT_DISB#_B 2 DISB# 23e VSW#12 12 12 46,47,50 PW R_VCORE_DRVON 36 ZCD_EN 074.81382.0CE3 VSW#13 13 68 1 23e 2 3 SMOD# VSW#14 14 VSW#15 15 PG4815 0R2J-2-GP VSW#16 16 VSW#17 17 5V_S5 VSW#18 18 GL#8 PGND 21 GAP-CLOSE-PWR-3-GP GL#9 PGND PWR_VCCGT_SNUB_2 GL#10 PGND GL#11 PGND PGND PGND PGND PGND NCP81382MNTXG-3-GP A PW R_VCCGT_GL2 8 19 9 20 10 21 11 22 23 24 31 37 PC4814 21DY SC2200P50V2KX-2GP 46 PW R_VCCGT_CSPB 46 PW R_VCCGT_CSNB 543

2 1 D 2 +VCCGT Confirm with EE: -2-GP 22uF/0805 total 35pcs (DY 5 pcs) C PT4801 10.20A SE330U2VDM-4-GP tro-X PG4809 79.33719.20C 12 21GAP-CLOSE-PWR-3-GP B PL4802 +VCCGT 23e 2 D15UH-2-GP 8.R1510.20A 12 SE330U2VDM-4-GP PT4802 21 SE330U2VDM-4-GP PT4803 21 GAP-CLOSE-PWR-3-GPPG4816 79.33719.20C 23e 79.33719.20C DY A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title NCP81382MN_CPU_VCCGT(3/3) Size Document Number Rev A2 Vegas SKL/KBL-U A00 D ate: Monday, June 27, 2016 Sheet 48 of 105 2 1

5 Elet43 D (Blanki C 43 B A 5

3 21 D ing) C 3 tro-X B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title NCP81210MN_CPU_VCCGTUS Size Document Number Rev A4 Vegas SKL/KBL-U A00 Date: Thursday, June 16, 2016 Sheet 49 of 105 2 1

5 4 3 Main Func = CPU_CORE DCBATOUT DCBATOUT_+VCCSA PG5023 D 21 GAP-CLOSE-PW R PG5024 21 GAP-CLOSE-PW R PR5013 2 PW R_VCCSA_BST_RC PU5002 45 DS 1 AON7410-GP 36 DS 27DS 2D2R3-1-U-GP 84.07410.A37 18DG PWR_VCCSA_BST PC5008 65 BOM SCD22U25V3KX-GP 21 C PU5001 46 PW R_VCCSA_PW M 1 BST DRVH 8 PW R_VCCSA_DRVH 46,47,48 PW R_VCORE_DRVON 2 PW M SW 7 PW R_VCCSA_SW 3 EN 6 5V_S5 4 VCC GND 5 DRVL PC5001 21 9 SC2D2U10V3KX-1GP GND NCP81253MNTBG-1-GP 45 DS 36 DS 074.81253.0AE3 PU5003 27DS AON7410-GP 18DG 84.07410.A37 Elet 65 BOM PW R_VCCSA_DRVL B 46 PW R_VCCSA_CSP 46 PW R_VCCSA_CSN A 543

21 DCBATOUT_+VCCSA D C 21 PC5029 PC5027 PC5002 B 21 21 SCD1U25V2KX-GP 12 SC10U25V5KX-GP #544669 Intel CRB Rev0.53 SC10U25V5KX-GP +VCCSA(ICCMAX.=6A) PW R_+VCCSA +VCCSA tro- 2X 1 PW R_+VCCSA PG5026 21 PL5001 GAP-CLOSE-PW R 12 PG5025 IND-D47UH-22-GP-U 21 68.R4710.10M GAP-CLOSE-PW R PR5014 12 PG5028 DY2D2R5F-2-GP 21 PG5021 PG5022 GAP-CLOSE-PW R PG5027 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP PWR_VCCSA_SNUB 21 DY PC503121 GAP-CLOSE-PW R SC2200P50V2KX-2GP PG5030 21 GAP-CLOSE-PW R PG5029 21 GAP-CLOSE-PW R PG5031 21 GAP-CLOSE-PW R Confirm with EE: 22uF/0805 total 20pcs (DY 5 pcs) <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title NCP81253MN_CPU_VCCSA Size Document Number Rev A3 Vegas SKL/KBL-U A00 Date: Monday, June 27, 2016 Sheet 50 of 105 21

5 4 3 SSID = PWR.Plane.Regulator_1p2v& 2D5V DCBATOUT PW R_DCBATOUT_VDDQ VID Logic-High = 0.75V PG5117 Logic-Low = 0.6V GAP-CLOSE-PW R-3-GP 12 PW R_VDDQ_VID D PG5118 PR5107 5V_S5 GAP-CLOSE-PW R-3-GP 5D1R2F-GP 12 12 CS 13 PC5102 VID 11 SC1U10V2KX-L1-GP VDD 12 OCP setting PW R_VDDQ_VDD PR5109 21 21 0R0402-PAD-1-GP PW R_VDDQ_CS 1 2 5V_S5 PR5114 3D3V_S521 220KR2F-L-GP21 PC5107 SC1U10V2KX-L1-GP PR5111 DY 10KR2F-L1-GP 40 PW R_VDDQ_PG PU5101 PR5112 RT8231AGQW -GP 2D2R3F-L-GP Freq. setting 750K -> 350K Hz 074.08231.0073 12 PW R_DCBATOUT_VDDQ BOOT 18 PW R_VDDQ_BOOT PW R_VDDQ_BOOT_A UGATE PR5113 PW R_VDDQ_PG 10 PGOOD 17 PW R_VDDQ_HG 750KR2F-L-GP PW R_VDDQ_TON 9 TON 12 PW R_VDDQ_EN 8 S5 PG5115 PW R_VTT_EN 7 S3 PHASE 16 PW R_VDDQ_PH GAP-CLOSE-PW R-3-GP PW R_VDDQ_VLDOIN 19 VLDOIN 1D2V_S3 12 21 PC5109 LGATE 15 PW R_VDDQ_LG SC10U6D3V3MX-L-GP PG5116 Close t inside GAP-CLOSE-PW R-3-GP PG510 12 GAP-C 1 C 1 VTTGND PGND 14 PW R_VDDQ_VTT 2D5V_PW ROK PR5128 1 2 0R0402-PAD PW R_VDDQ_EN VDDQ 5 PW R_VDDQ_VDDQ FB 6 PW R_VDDQ_FB 21 20 VTT DY PC5106 2 VTTSNS SCD1U16V2KX-L-GP 21 GND DY 3 GND 21 R1 S5 2 1 PWR_VDDQ_VTTREF 4 VTTREF PC5115 PR5116 SC18P50V2JN-1 15K8R2F-GP Elet 2 1 17,24,27,40 SIO_SLP_S3# PR5126 1 DY 2 0R2J-2-GP PW R_VTT_EN 5 SM_PGCNTL_R 0R0402-PAD PR5127 1 2 S3 21 R2 PR5117 20KR2F-L3-GP PC5116 Vout Setting Vout = Vref * ( 1 + = 0.675 * ( 1 + = 1.2V Vout = 0.6V VID vs Vref Table VID Logic-High => Vref = 0.67 Iomax = 1.2A VID Logic-Low => Vref = 0.7 note. Vref can only be changed B 0.675v to 0.75v after power-on PW R_VDDQ_VTT PG5113 0D6V_S0 GAP-CLOSE-PW R-3-GP 21 PC5118 21 PG5114 21 GAP-CLOSE-PW R-3-GP PC5117 21 43K2R2F-L-GP SC10U6D3V3MX-GPDY SC10U6D3V3MX-L-GP SC10U6D3V3MX-L-GP APL5930 for VPP_2D5V 5V_S5 3D3V_S5 3D3V_S5 PC5152 PR5155 21 PC5156 21 10KR2F-L1-GP 21 SC1U50V3KX-GP EE needs check sequence control PC5155 PU5151 SC4700P50V2KX-1GP 6 VCNTL VIN#5 5 21 21 7 POK VOUT#4 4 2D5V_PW ROK PR5158 1 2 0R0402-PAD PW R_2D5V_POK 8 EN VOUT#3 3 2 0R0402-PAD PW R_2D5V_EN 9 VIN#9 2 17,24,40,44 SIO_SLP_S4# PR5153 1 FB 1 GND A APL5930KAI- T R G - G P PR5152 DY DY 74.05930.03D PR5151 47KR2J-2-GP 2ND = 74.G9731.03D PWR_2D5V_FB SCD047U25V2KX-GP 543